國立虎尾科技大學 |

Hardware security and trust = design and deployment of integrated circuits in a threatened environment /

Record Type:	Language materials, printed : Monograph/item
Title/Author:	Hardware security and trust/ edited by Nicolas Sklavos ... [et al.].
Reminder of title:	design and deployment of integrated circuits in a threatened environment /
other author:	Sklavos, Nicolas.
Published:	Cham :Springer International Publishing : : 2017.,
Description:	x, 254 p. :ill., digital ; : 24 cm.;
Contained By:	Springer eBooks
Subject:	Computer security. -
Online resource:	http://dx.doi.org/10.1007/978-3-319-44318-8
ISBN:	9783319443188

Hardware security and trust = design and deployment of integrated circuits in a threatened environment /
Hardware security and trustdesign and deployment of integrated circuits in a threatened environment /[electronic resource] :edited by Nicolas Sklavos ... [et al.]. - Cham :Springer International Publishing :2017. - x, 254 p. :ill., digital ;24 cm.

AES Datapaths on FPGAs: a State of the Art Analysis -- Fault Attacks, Injection Techniques and Tools for Simulation -- Recent developments in side-channel analysis on Elliptic Curve Cryptography implementations -- Practical Session: Differential Power Analysis for Beginners -- Fault and Power Analysis Attack Protection Techniques for Standardized Public Key Cryptosystems -- Scan Design: Basics, Advancements and Vulnerabilities -- Manufacturing Testing & Security Countermeasures -- Malware Threats and Solutions for Trustworthy Mobile Systems Design -- Ring Oscillators and Hardware Trojan Detection -- Notions on Silicon Physically Unclonable Functions -- Implementation of delay-based PUFs on Altera FPGAs -- Implementation and Analysis of Ring Oscillator Circuits on Xilinx FPGAs.

This book provides a comprehensive introduction to hardware security, from specification to implementation. Applications discussed include embedded systems ranging from small RFID tags to satellites orbiting the earth. The authors describe a design and synthesis flow, which will transform a given circuit into a secure design incorporating counter-measures against fault attacks. In order to address the conflict between testability and security, the authors describe innovative design-for-testability (DFT) computer-aided design (CAD) tools that support security challenges, engineered for compliance with existing, commercial tools. Secure protocols are discussed, which protect access to necessary test infrastructures and enable the design of secure access controllers. Covers all aspects of hardware security including design, manufacturing, testing, reliability, validation and utilization; Describes new methods and algorithms for the identification/detection of hardware trojans; Defines new architectures capable of detecting faults and resisting fault attacks; Establishes a design and synthesis flow to transform a given circuit into a secure design, incorporating counter-measures against fault attacks.

ISBN: 9783319443188

Standard No.: 10.1007/978-3-319-44318-8doiSubjects--Topical Terms:

557122
Computer security.

LC Class. No.: QA76.9.A25

Dewey Class. No.: 005.8

Hardware security and trust = design and deployment of integrated circuits in a threatened environment /
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505 0 $a AES Datapaths on FPGAs: a State of the Art Analysis -- Fault Attacks, Injection Techniques and Tools for Simulation -- Recent developments in side-channel analysis on Elliptic Curve Cryptography implementations -- Practical Session: Differential Power Analysis for Beginners -- Fault and Power Analysis Attack Protection Techniques for Standardized Public Key Cryptosystems -- Scan Design: Basics, Advancements and Vulnerabilities -- Manufacturing Testing & Security Countermeasures -- Malware Threats and Solutions for Trustworthy Mobile Systems Design -- Ring Oscillators and Hardware Trojan Detection -- Notions on Silicon Physically Unclonable Functions -- Implementation of delay-based PUFs on Altera FPGAs -- Implementation and Analysis of Ring Oscillator Circuits on Xilinx FPGAs.
520 $a This book provides a comprehensive introduction to hardware security, from specification to implementation. Applications discussed include embedded systems ranging from small RFID tags to satellites orbiting the earth. The authors describe a design and synthesis flow, which will transform a given circuit into a secure design incorporating counter-measures against fault attacks. In order to address the conflict between testability and security, the authors describe innovative design-for-testability (DFT) computer-aided design (CAD) tools that support security challenges, engineered for compliance with existing, commercial tools. Secure protocols are discussed, which protect access to necessary test infrastructures and enable the design of secure access controllers. Covers all aspects of hardware security including design, manufacturing, testing, reliability, validation and utilization; Describes new methods and algorithms for the identification/detection of hardware trojans; Defines new architectures capable of detecting faults and resisting fault attacks; Establishes a design and synthesis flow to transform a given circuit into a secure design, incorporating counter-measures against fault attacks.
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