Lettnin, Djones Vinicius.

Overview

Works:	1 works in 1 publications in 1 languages

Titles

Synthesizable VHDL design for FPGAs by: Bezerra, Eduardo Augusto.; SpringerLink (Online service); Lettnin, Djones Vinicius. (Language materials, printed)

Subjects

Circuits and Systems. Electronics and Microelectronics, Instrumentation. Engineering. Field programmable gate arrays. Software Engineering/Programming and Operating Systems. VHDL (Computer hardware description language)