Yalamanchili, Sudhakar

Overview

Works:	2 works in 2 publications in 2 languages

Titles

Introductory VHDL : from simulation to synthesis by: Yalamanchili, Sudhakar (Language materials, printed)

VHDL概論 : 由模擬到合成 by: 雅拉曼契里 ((Yalamanchili, Sudhakar)); 吳中浩; Yalamanchili, Sudhakar (Language materials, printed)

Subjects