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Efficient Design of Variation-Resilient Ultra-Low Energy Digital Processors

Record Type:	Language materials, printed : Monograph/item
Title/Author:	Efficient Design of Variation-Resilient Ultra-Low Energy Digital Processors/ by Hans Reyserhove, Wim Dehaene.
Author:	Reyserhove, Hans.
other author:	Dehaene, Wim.
Description:	XXIV, 209 p. 141 illus., 80 illus. in color.online resource. :
Contained By:	Springer Nature eBook
Subject:	Electronic circuits. -
Online resource:	https://doi.org/10.1007/978-3-030-12485-4
ISBN:	9783030124854

Efficient Design of Variation-Resilient Ultra-Low Energy Digital Processors
Reyserhove, Hans.

Efficient Design of Variation-Resilient Ultra-Low Energy Digital Processors[electronic resource] /by Hans Reyserhove, Wim Dehaene. - 1st ed. 2019. - XXIV, 209 p. 141 illus., 80 illus. in color.online resource.

Chapter 1. Energy-Efficient Processors: Challenges and Solutions -- Chapter 2. Near-Threshold Operation: Technology, Building Blocks and Architecture -- Chapter 3. Efficient VLSI Design Flow -- Chapter 4. Ultra-Low Voltage Microcontrollers -- Chapter 5. Error Detection and Correction -- Chapter 6. Timing Error-Aware Microcontroller -- Chapter 7. Conclusion.

This book enables readers to achieve ultra-low energy digital system performance. The author’s main focus is the energy consumption of microcontroller architectures in digital (sub)-systems. The book covers a broad range of topics extensively: from circuits through design strategy to system architectures. The result is a set of techniques and a context to realize minimum energy digital systems. Several prototype silicon implementations are discussed, which put the proposed techniques to the test. The achieved results demonstrate an extraordinary combination of variation-resilience, high speed performance and ultra-low energy. Presents a full bottom-up micro-electronics approach: circuit-level, design strategy and CAD automation, architecture optimization Motivates discussion with simulation results and/or measurements in an advanced nanometer CMOS process Compares traditional circuit/design/architecture techniques and state-of-the-art, setting the landscape of current best performance and how it can be improved.

ISBN: 9783030124854

Standard No.: 10.1007/978-3-030-12485-4doiSubjects--Topical Terms:

563332
Electronic circuits.

LC Class. No.: TK7888.4

Dewey Class. No.: 621.3815

Efficient Design of Variation-Resilient Ultra-Low Energy Digital Processors
LDR:02760nam a22003975i 4500 001 1013962
003 DE-He213
005 20200701214559.0
007 cr nn 008mamaa
008 210106s2019 gw | s |||| 0|eng d
020 $a 9783030124854 $9 978-3-030-12485-4
024 7 $a 10.1007/978-3-030-12485-4 $2 doi
035 $a 978-3-030-12485-4
050 4 $a TK7888.4
072 7 $a TJFC $2 bicssc
072 7 $a TEC008010 $2 bisacsh
072 7 $a TJFC $2 thema
082 0 4 $a 621.3815 $2 23
100 1 $a Reyserhove, Hans. $e author. $4 aut $4 http://id.loc.gov/vocabulary/relators/aut $3 1308229
245 1 0 $a Efficient Design of Variation-Resilient Ultra-Low Energy Digital Processors $h [electronic resource] / $c by Hans Reyserhove, Wim Dehaene.
250 $a 1st ed. 2019.
264 1 $a Cham : $b Springer International Publishing : $b Imprint: Springer, $c 2019.
300 $a XXIV, 209 p. 141 illus., 80 illus. in color. $b online resource.
336 $a text $b txt $2 rdacontent
337 $a computer $b c $2 rdamedia
338 $a online resource $b cr $2 rdacarrier
347 $a text file $b PDF $2 rda
505 0 $a Chapter 1. Energy-Efficient Processors: Challenges and Solutions -- Chapter 2. Near-Threshold Operation: Technology, Building Blocks and Architecture -- Chapter 3. Efficient VLSI Design Flow -- Chapter 4. Ultra-Low Voltage Microcontrollers -- Chapter 5. Error Detection and Correction -- Chapter 6. Timing Error-Aware Microcontroller -- Chapter 7. Conclusion.
520 $a This book enables readers to achieve ultra-low energy digital system performance. The author’s main focus is the energy consumption of microcontroller architectures in digital (sub)-systems. The book covers a broad range of topics extensively: from circuits through design strategy to system architectures. The result is a set of techniques and a context to realize minimum energy digital systems. Several prototype silicon implementations are discussed, which put the proposed techniques to the test. The achieved results demonstrate an extraordinary combination of variation-resilience, high speed performance and ultra-low energy. Presents a full bottom-up micro-electronics approach: circuit-level, design strategy and CAD automation, architecture optimization Motivates discussion with simulation results and/or measurements in an advanced nanometer CMOS process Compares traditional circuit/design/architecture techniques and state-of-the-art, setting the landscape of current best performance and how it can be improved.
650 0 $a Electronic circuits. $3 563332
650 0 $a Signal processing. $3 561459
650 0 $a Image processing. $3 557495
650 0 $a Speech processing systems. $3 564428
650 0 $a Electronics. $3 596389
650 0 $a Microelectronics. $3 554956
650 1 4 $a Circuits and Systems. $3 670901
650 2 4 $a Signal, Image and Speech Processing. $3 670837
650 2 4 $a Electronics and Microelectronics, Instrumentation. $3 670219
700 1 $a Dehaene, Wim. $4 aut $4 http://id.loc.gov/vocabulary/relators/aut $3 1023722
710 2 $a SpringerLink (Online service) $3 593884
773 0 $t Springer Nature eBook
776 0 8 $i Printed edition: $z 9783030124847
776 0 8 $i Printed edition: $z 9783030124861
776 0 8 $i Printed edition: $z 9783030124878
856 4 0 $u https://doi.org/10.1007/978-3-030-12485-4
912 $a ZDB-2-ENG
912 $a ZDB-2-SXE
950 $a Engineering (SpringerNature-11647)
950 $a Engineering (R0) (SpringerNature-43712)