國立虎尾科技大學 |

Periodic Information Leakage Fault Detection on a RISC-V Microprocessor /

Record Type:	Language materials, printed : Monograph/item
Title/Author:	Periodic Information Leakage Fault Detection on a RISC-V Microprocessor // Idris Olansile Somoye.
Author:	Somoye, Idris Olansile,
Description:	1 electronic resource (92 pages)
Notes:	Source: Dissertations Abstracts International, Volume: 86-04, Section: B.
Contained By:	Dissertations Abstracts International86-04B.
Subject:	Electrical engineering. -
Online resource:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=31299799
ISBN:	9798896076926

Periodic Information Leakage Fault Detection on a RISC-V Microprocessor /
Somoye, Idris Olansile,

Periodic Information Leakage Fault Detection on a RISC-V Microprocessor /Idris Olansile Somoye. - 1 electronic resource (92 pages)

Source: Dissertations Abstracts International, Volume: 86-04, Section: B.

The execution behavior of a Microprocessor (µP) in the presence of a fault is difficult to predict because of the complex interactions across pipeline stages and between functional units within the architecture. Fault effects are known to not introduce any type of anomaly in the input-output behavior for 10s of thousands to millions of clock cycles. These characteristics increase the difficulty of evaluating µP architectures for resilience to information leakage events, i.e., scenarios where a fault causes sensitive data such as an encryption key to be inadvertently diverted to a primary output channel. This dissertation explores two promising strategies for periodic testing for fault detection in µPs known as self-assertion-based countermeasures and counter-based periodic testing.

English

ISBN: 9798896076926Subjects--Topical Terms:

596380
Electrical engineering.
Subjects--Index Terms:

Cryptography

Periodic Information Leakage Fault Detection on a RISC-V Microprocessor /
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245 1 0 $a Periodic Information Leakage Fault Detection on a RISC-V Microprocessor / $c Idris Olansile Somoye.
264 1 $a Ann Arbor : $b ProQuest Dissertations & Theses, $c 2024
300 $a 1 electronic resource (92 pages)
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500 $a Source: Dissertations Abstracts International, Volume: 86-04, Section: B.
500 $a Advisors: Plusquelic, Jim Committee members: Tsiropoulou, Eirini; Zarkesh-Ha, Payman; Nyarko, Kofi.
502 $b Ph.D. $c The University of New Mexico $d 2024.
520 $a The execution behavior of a Microprocessor (µP) in the presence of a fault is difficult to predict because of the complex interactions across pipeline stages and between functional units within the architecture. Fault effects are known to not introduce any type of anomaly in the input-output behavior for 10s of thousands to millions of clock cycles. These characteristics increase the difficulty of evaluating µP architectures for resilience to information leakage events, i.e., scenarios where a fault causes sensitive data such as an encryption key to be inadvertently diverted to a primary output channel. This dissertation explores two promising strategies for periodic testing for fault detection in µPs known as self-assertion-based countermeasures and counter-based periodic testing.
546 $a English
590 $a School code: 0142
650 4 $a Electrical engineering. $3 596380
650 4 $a Computer engineering. $3 569006
650 4 $a Computer science. $3 573171
653 $a Cryptography
653 $a Emulation
653 $a Security
653 $a Microprocessor
653 $a Periodic testing
690 $a 0544
690 $a 0984
690 $a 0464
710 2 $a The University of New Mexico. $b Engineering. $3 1465664
720 1 $a Plusquelic, Jim $e degree supervisor.
773 0 $t Dissertations Abstracts International $g 86-04B.
790 $a 0142
791 $a Ph.D.
792 $a 2024
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