國立虎尾科技大學 |

Graph Machine Learning for Hardware Security and Security of Graph Machine Learning: Attacks and Defenses /

Record Type:	Language materials, printed : Monograph/item
Title/Author:	Graph Machine Learning for Hardware Security and Security of Graph Machine Learning: Attacks and Defenses // Subhajit Dutta Chowdhury.
Author:	Dutta Chowdhury, Subhajit,
Description:	1 electronic resource (188 pages)
Notes:	Source: Dissertations Abstracts International, Volume: 86-03, Section: B.
Contained By:	Dissertations Abstracts International86-03B.
Subject:	Electrical engineering. -
Online resource:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=31561813
ISBN:	9798384456186

Graph Machine Learning for Hardware Security and Security of Graph Machine Learning: Attacks and Defenses /
Dutta Chowdhury, Subhajit,

Graph Machine Learning for Hardware Security and Security of Graph Machine Learning: Attacks and Defenses /Subhajit Dutta Chowdhury. - 1 electronic resource (188 pages)

Source: Dissertations Abstracts International, Volume: 86-03, Section: B.

The burgeoning costs of integrated circuit (IC) fabrication have led to widespread globalization of the IC supply chain, exposing IC designs to hardware security threats like intellectual property (IP) theft or piracy, illegal overproduction, and hardware Trojan insertion. These security challenges have triggered research on the exploration of secure design methodologies. However, the security solutions are often incomplete, leaving new channels of sensitive information leakage which must be considered. In this dissertation, we introduce novel analysis methods, attacks, and defenses based on graph learning, and specifically graph neural networks (GNNs), to address some of the information leakage challenges to trustworthy ICs. GNNs are particularly effective in processing circuit netlists, which are inherently graph-structured data. They can leverage the node properties of a circuit netlist and their neighborhood information to successfully perform different tasks. First, we present a state register identification technique with GNNs (ReIGNN) that enables circuit reverse engineering for hardware protection. ReIGNN combines, for the first time, GNNs with structural analysis to identify the state registers and help recover the control logic of a design. We then present a graph learning-driven attack (GLEAN) for analyzing the security guarantees of different logic obfuscation (or locking) methods by assessing the level of information leakage from their structural signatures. Graph learning can also be used to detect topologically and functionally similar logic gates or wires in a design, which in turn can be used to confuse existing machine learning-based attacks on logic obfuscation. In this context, we introduce a graph similarity-based logic locking technique (SimLL) which is the state-of-the-art defense against existing oracle-less learning-based attacks. We also introduce a reconfigurable logic-based locking technique which improves resilience against existing oracle-based attacks. Reconfigurable logic blocks like look-up table (LUT), and switch-boxes reduce the amount of information leaked from their structural signatures making them resilient against machine learning-based attacks too.Finally, security is a major concern for GNN models too. GNN models are highly vulnerable to adversarial attacks, where imperceptible perturbations to the input data can significantly impact their performance. To mitigate this vulnerability, we present a GNN training method that yields models that are sparse and compressed, yet adversarially robust. Overall, this dissertation explores the intersection of graph learning and hardware security highlighting the critical role of graph learning in fortifying hardware security as well as the importance of security considerations in graph learning.

English

ISBN: 9798384456186Subjects--Topical Terms:

596380
Electrical engineering.
Subjects--Index Terms:

Machine learning

Graph Machine Learning for Hardware Security and Security of Graph Machine Learning: Attacks and Defenses /
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520 $a The burgeoning costs of integrated circuit (IC) fabrication have led to widespread globalization of the IC supply chain, exposing IC designs to hardware security threats like intellectual property (IP) theft or piracy, illegal overproduction, and hardware Trojan insertion. These security challenges have triggered research on the exploration of secure design methodologies. However, the security solutions are often incomplete, leaving new channels of sensitive information leakage which must be considered. In this dissertation, we introduce novel analysis methods, attacks, and defenses based on graph learning, and specifically graph neural networks (GNNs), to address some of the information leakage challenges to trustworthy ICs. GNNs are particularly effective in processing circuit netlists, which are inherently graph-structured data. They can leverage the node properties of a circuit netlist and their neighborhood information to successfully perform different tasks. First, we present a state register identification technique with GNNs (ReIGNN) that enables circuit reverse engineering for hardware protection. ReIGNN combines, for the first time, GNNs with structural analysis to identify the state registers and help recover the control logic of a design. We then present a graph learning-driven attack (GLEAN) for analyzing the security guarantees of different logic obfuscation (or locking) methods by assessing the level of information leakage from their structural signatures. Graph learning can also be used to detect topologically and functionally similar logic gates or wires in a design, which in turn can be used to confuse existing machine learning-based attacks on logic obfuscation. In this context, we introduce a graph similarity-based logic locking technique (SimLL) which is the state-of-the-art defense against existing oracle-less learning-based attacks. We also introduce a reconfigurable logic-based locking technique which improves resilience against existing oracle-based attacks. Reconfigurable logic blocks like look-up table (LUT), and switch-boxes reduce the amount of information leaked from their structural signatures making them resilient against machine learning-based attacks too.Finally, security is a major concern for GNN models too. GNN models are highly vulnerable to adversarial attacks, where imperceptible perturbations to the input data can significantly impact their performance. To mitigate this vulnerability, we present a GNN training method that yields models that are sparse and compressed, yet adversarially robust. Overall, this dissertation explores the intersection of graph learning and hardware security highlighting the critical role of graph learning in fortifying hardware security as well as the importance of security considerations in graph learning.
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