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A primer on compression in the memory hierarchy /

Record Type:	Language materials, printed : Monograph/item
Title/Author:	A primer on compression in the memory hierarchy // Somayeh Sardashti, Angelos Arelakis, Per Stenstrom, David A. Wood
Author:	Sardashti, Somayeh,
other author:	Arelakis, Angelos,
Description:	1 online resource (xvii, 68 pages) :illustrations :
Subject:	Data compression (Computer science) -
Online resource:	http://portal.igpublish.com/iglibrary/search/MCPB0000864.html
ISBN:	9781627057042$q(electronic bk.)

A primer on compression in the memory hierarchy /
Sardashti, Somayeh,

A primer on compression in the memory hierarchy /Somayeh Sardashti, Angelos Arelakis, Per Stenstrom, David A. Wood - 1 online resource (xvii, 68 pages) :illustrations - Synthesis lectures on computer architecture,#361935-3243 ;. - Synthesis lectures in computer architecture ;#41 .

Includes bibliographical references (pages 55-66)

1. Introduction -- 2. Compression algorithms -- 2.1 Value locality -- 2.2 Compression algorithm taxonomy -- 2.3 Classification of compression algorithms -- 2.3.1 Run-length encoding -- 2.3.2 Lempel-Ziv (LZ) coding -- 2.3.3 Huffman coding -- 2.3.4 Frequent value compression (FVC) -- 2.3.5 Frequent pattern compression (FPC) -- 2.3.6 Base-delta-immediate (BDI) -- 2.3.7 Cache packer (C-PACK) -- 2.3.8 Deduplication -- 2.3.9 Instruction compression -- 2.3.10 Floating-point compression -- 2.3.11 Hybrid compression -- 2.4 Metrics to evaluate the success of a compression algorithm -- 2.5 Summary -- 3. Cache compression -- 3.1 Cache compaction taxonomy -- 3.2 Cache compaction mechanisms -- 3.2.1 Simple compaction mechanisms -- 3.2.2 Supporting variable size compression -- 3.2.3 Decoupled compressed caches -- 3.2.4 Skewed compressed caches -- 3.3 Policies to manage compressed caches -- 3.4 Cache compression to improve cache power and area -- 3.5 Summary -- 4. Memory compression

This synthesis lecture presents the current state-of-the-art in applying low-latency, lossless hardware compression algorithms to cache, memory, and the memory/cache link. There are many non- trivial challenges that must be addressed to make data compression work well in this context. First, since compressed data must be decompressed before it can be accessed, decompression latency ends up on the critical memory access path. This imposes a significant constraint on the choice of compression algorithms. Second, while conventional memory systems store fixed-size entities like data types, cache blocks, and memory pages, these entities will suddenly vary in size in a memory system that employs compression. Dealing with variable size entities in a memory system using compression has a significant impact on the way caches are organized and how to manage the resources in main memory. We systematically discuss solutions in the open literature to these problems

ISBN: 9781627057042$q(electronic bk.)

Standard No.: 10.2200 / S00683ED1V01Y201511CAC036doiSubjects--Topical Terms:

677871
Data compression (Computer science)
Subjects--Index Terms:

cache designIndex Terms--Genre/Form:

761329
Electronic books

LC Class. No.: QA76.9.D33 / S276 2016

Dewey Class. No.: 005.746

A primer on compression in the memory hierarchy /
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245 1 2 $a A primer on compression in the memory hierarchy / $c Somayeh Sardashti, Angelos Arelakis, Per Stenstrom, David A. Wood
264 1 $a [San Rafael, California] : $b Morgan & Claypool Publishers, $c [2016]
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490 0 $a Synthesis lectures on computer architecture, $x 1935-3243 ; $v #36
504 $a Includes bibliographical references (pages 55-66)
505 0 $a 1. Introduction -- 2. Compression algorithms -- 2.1 Value locality -- 2.2 Compression algorithm taxonomy -- 2.3 Classification of compression algorithms -- 2.3.1 Run-length encoding -- 2.3.2 Lempel-Ziv (LZ) coding -- 2.3.3 Huffman coding -- 2.3.4 Frequent value compression (FVC) -- 2.3.5 Frequent pattern compression (FPC) -- 2.3.6 Base-delta-immediate (BDI) -- 2.3.7 Cache packer (C-PACK) -- 2.3.8 Deduplication -- 2.3.9 Instruction compression -- 2.3.10 Floating-point compression -- 2.3.11 Hybrid compression -- 2.4 Metrics to evaluate the success of a compression algorithm -- 2.5 Summary -- 3. Cache compression -- 3.1 Cache compaction taxonomy -- 3.2 Cache compaction mechanisms -- 3.2.1 Simple compaction mechanisms -- 3.2.2 Supporting variable size compression -- 3.2.3 Decoupled compressed caches -- 3.2.4 Skewed compressed caches -- 3.3 Policies to manage compressed caches -- 3.4 Cache compression to improve cache power and area -- 3.5 Summary -- 4. Memory compression
505 0 0 $a 4.1 Baseline system architecture of a compressed memory system -- 4.2 Compression algorithms -- 4.3 Compressed memory organizations -- 4.3.1 The IBM MXT approach -- 4.3.2 The Ekman/Stenstrom approach -- 4.3.3 The decoupled zero-compression approach -- 4.3.4 The linear compressed pages approach -- 4.4 Summary -- 5. Cache/memory link compression -- 5.1 Link compression for narrow value locality -- 5.2 Link compression for clustered value locality -- 5.3 Link compression for temporal value locality -- 5.3.1 The citron scheme -- 5.3.2 Frequent value encoding -- 5.4 Link compression methods applied to compressed memory data -- 5.5 Summary -- 6. Concluding remarks -- References -- Authors' biographies
520 $a This synthesis lecture presents the current state-of-the-art in applying low-latency, lossless hardware compression algorithms to cache, memory, and the memory/cache link. There are many non- trivial challenges that must be addressed to make data compression work well in this context. First, since compressed data must be decompressed before it can be accessed, decompression latency ends up on the critical memory access path. This imposes a significant constraint on the choice of compression algorithms. Second, while conventional memory systems store fixed-size entities like data types, cache blocks, and memory pages, these entities will suddenly vary in size in a memory system that employs compression. Dealing with variable size entities in a memory system using compression has a significant impact on the way caches are organized and how to manage the resources in main memory. We systematically discuss solutions in the open literature to these problems
520 $a Chapter 2 provides the foundations of data compression by first introducing the fundamental concept of value locality. We then introduce a taxonomy of compression algorithms and show how previously proposed algorithms fit within that logical framework. Chapter 3 discusses the different ways that cache memory systems can employ compression, focusing on the tradeoffs between latency, capacity, and complexity of alternative ways to compact compressed cache blocks. Chapter 4 discusses issues in applying data compression to main memory and Chapter 5 covers techniques for compressing data on the cache-to-memory links. This book should help a skilled memory system designer understand the fundamental challenges in applying compression to the memory hierarchy and introduce him/her to the state-of-the-art techniques in addressing them
588 $a Online resource; title from PDF title page (Morgan & Claypool, viewed on January 5, 2016)
588 $a Print version record
650 0 $a Data compression (Computer science) $3 677871
650 0 $a Memory hierarchy (Computer science) $3 893059
653 $a cache design
653 $a memory system
653 $a memory hierarchy
653 $a data compression
653 $a performance
653 $a energy efficiency
655 4 $a Electronic books $2 local. $3 761329
700 1 $a Arelakis, Angelos, $e author $3 1175746
700 1 $a Stenstrom, Per, $e author $3 1175747
700 1 $a Wood, David Allen, $e author $3 1175748
776 0 8 $i Print version: $a Sardashti, Somayeh. $t Primer on compression in the memory hierarchy. $d [San Rafael, Calif.] : Morgan & Claypool Publishers, [2016] $z 9781627054157
830 0 $a Synthesis lectures in computer architecture ; $v #41 $3 1137472
856 4 0 $u http://portal.igpublish.com/iglibrary/search/MCPB0000864.html