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Computer aided verification = 31st I...
~
Tasiran, Serdar.
Computer aided verification = 31st International Conference, CAV 2019, New York City, NY, USA, July 15-18, 2019 : proceedings.. Part II /
Record Type:
Language materials, printed : Monograph/item
Title/Author:
Computer aided verification/ edited by Isil Dillig, Serdar Tasiran.
Reminder of title:
31st International Conference, CAV 2019, New York City, NY, USA, July 15-18, 2019 : proceedings.
remainder title:
CAV 2019
other author:
Dillig, Isil.
corporate name:
Workshop on the Preservation of Stability under Discretization
Published:
Cham :Springer International Publishing : : 2019.,
Description:
xx, 549 p. :ill., digital ; : 24 cm.;
Contained By:
Springer eBooks
Subject:
Computer programs - Congresses. - Verification -
Online resource:
https://doi.org/10.1007/978-3-030-25543-5
ISBN:
9783030255435
Computer aided verification = 31st International Conference, CAV 2019, New York City, NY, USA, July 15-18, 2019 : proceedings.. Part II /
Computer aided verification
31st International Conference, CAV 2019, New York City, NY, USA, July 15-18, 2019 : proceedings.Part II /[electronic resource] :CAV 2019edited by Isil Dillig, Serdar Tasiran. - Cham :Springer International Publishing :2019. - xx, 549 p. :ill., digital ;24 cm. - Lecture notes in computer science,115620302-9743 ;. - Lecture notes in computer science ;6140..
Logics, Decision Procedures, and Solvers -- Satisfiability Checking for Mission-Time LTL -- High-Level Abstractions for Simplifying Extended String Constraints in SMT -- Alternating Automata Modulo First Order Theories -- Q3B: An Efficient BDD-based SMT Solver for Quantified Bit-Vectors -- CVC4SY: Smart and Fast Term Enumeration for Syntax-Guided Synthesis -- Incremental Determinization for Quantifier Elimination and Functional Synthesis -- Numerical Programs -- Loop Summarization with Rational Vector Addition Systems -- Invertibility Conditions for Floating-Point Formulas -- Numerically-Robust Inductive Proof Rules for Continuous Dynamical Systems -- Icing: Supporting Fast-math Style Optimizations in a Verified Compiler -- Sound Approximation of Programs with Elementary Functions -- Verification -- Formal verification of quantum algorithms using quantum Hoare logic -- SecCSL: Security Concurrent Separation Logic -- Reachability Analysis for AWS-based Networks -- Distributed Systems and Networks -- Verification of Threshold-Based Distributed Algorithms by Decomposition to Decidable Logics -- Gradual Consistency Checking -- Checking Robustness Against Snapshot Isolation -- Efficient verification of network fault tolerance via counterexampleguided refinement -- On the Complexity of Checking Consistency for Replicated Data Types -- Communication-closed asynchronous protocols -- Verification and Invariants -- Interpolating Strong Induction -- Verifying Asynchronous Event-Driven Programs Using Partial Abstract Transformers -- Inferring Inductive Invariants from Phase Structures -- Termination of Triangular Integer Loops is Decidable -- AliveInLean: A Verified LLVM Peephole Optimization Verifier -- Concurrency -- Automated Parameterized Verification of CRDTs -- What's wrong with on-the-y partial order reduction -- Integrating Formal Schedulability Analysis into a Verifed OS Kernel -- Rely-guarantee Reasoning about Concurrent Memory Management in Zephyr RTOS -- Violat: Generating Tests of Observational Refinement for Concurrent Objects.
Open access.
The open access two-volume set LNCS 11561 and 11562 constitutes the refereed proceedings of the 31st International Conference on Computer Aided Verification, CAV 2019, held in New York City, USA, in July 2019. The 52 full papers presented together with 13 tool papers and 2 case studies, were carefully reviewed and selected from 258 submissions. The papers were organized in the following topical sections: Part I: automata and timed systems; security and hyperproperties; synthesis; model checking; cyber-physical systems and machine learning; probabilistic systems, runtime techniques; dynamical, hybrid, and reactive systems; Part II: logics, decision procedures; and solvers; numerical programs; verification; distributed systems and networks; verification and invariants; and concurrency.
ISBN: 9783030255435
Standard No.: 10.1007/978-3-030-25543-5doiSubjects--Topical Terms:
792454
Computer programs
--Verification--Congresses.
LC Class. No.: QA76.758 / .C38 2019
Dewey Class. No.: 005.1
Computer aided verification = 31st International Conference, CAV 2019, New York City, NY, USA, July 15-18, 2019 : proceedings.. Part II /
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Logics, Decision Procedures, and Solvers -- Satisfiability Checking for Mission-Time LTL -- High-Level Abstractions for Simplifying Extended String Constraints in SMT -- Alternating Automata Modulo First Order Theories -- Q3B: An Efficient BDD-based SMT Solver for Quantified Bit-Vectors -- CVC4SY: Smart and Fast Term Enumeration for Syntax-Guided Synthesis -- Incremental Determinization for Quantifier Elimination and Functional Synthesis -- Numerical Programs -- Loop Summarization with Rational Vector Addition Systems -- Invertibility Conditions for Floating-Point Formulas -- Numerically-Robust Inductive Proof Rules for Continuous Dynamical Systems -- Icing: Supporting Fast-math Style Optimizations in a Verified Compiler -- Sound Approximation of Programs with Elementary Functions -- Verification -- Formal verification of quantum algorithms using quantum Hoare logic -- SecCSL: Security Concurrent Separation Logic -- Reachability Analysis for AWS-based Networks -- Distributed Systems and Networks -- Verification of Threshold-Based Distributed Algorithms by Decomposition to Decidable Logics -- Gradual Consistency Checking -- Checking Robustness Against Snapshot Isolation -- Efficient verification of network fault tolerance via counterexampleguided refinement -- On the Complexity of Checking Consistency for Replicated Data Types -- Communication-closed asynchronous protocols -- Verification and Invariants -- Interpolating Strong Induction -- Verifying Asynchronous Event-Driven Programs Using Partial Abstract Transformers -- Inferring Inductive Invariants from Phase Structures -- Termination of Triangular Integer Loops is Decidable -- AliveInLean: A Verified LLVM Peephole Optimization Verifier -- Concurrency -- Automated Parameterized Verification of CRDTs -- What's wrong with on-the-y partial order reduction -- Integrating Formal Schedulability Analysis into a Verifed OS Kernel -- Rely-guarantee Reasoning about Concurrent Memory Management in Zephyr RTOS -- Violat: Generating Tests of Observational Refinement for Concurrent Objects.
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