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Microarchitecture of Network-on-Chip Routers = A Designer's Perspective /

Record Type:	Language materials, printed : Monograph/item
Title/Author:	Microarchitecture of Network-on-Chip Routers/ by Giorgos Dimitrakopoulos, Anastasios Psarras, Ioannis Seitanidis.
Reminder of title:	A Designer's Perspective /
Author:	Dimitrakopoulos, Giorgos.
other author:	Psarras, Anastasios.
Description:	XIV, 175 p. 134 illus., 77 illus. in color.online resource. :
Contained By:	Springer Nature eBook
Subject:	Electronic circuits. -
Online resource:	https://doi.org/10.1007/978-1-4614-4301-8
ISBN:	9781461443018

Microarchitecture of Network-on-Chip Routers = A Designer's Perspective /
Dimitrakopoulos, Giorgos.

Microarchitecture of Network-on-Chip RoutersA Designer's Perspective /[electronic resource] :by Giorgos Dimitrakopoulos, Anastasios Psarras, Ioannis Seitanidis. - 1st ed. 2015. - XIV, 175 p. 134 illus., 77 illus. in color.online resource.

Introduction to network-on-chip design -- Link-level flow control and buffering -- Baseline switching modules and routers -- Arbitration logic -- Pipelined wormhole routers -- Virtual-channel flow control and buffering -- Baseline virtual-channel based switching modules and routers -- High-speed allocators for VC-based routers -- Pipelined virtual-channel-based routers.

This book focuses on the microarchitecture of network-on-chip routers from a designer’s perspective, providing ready-to-use solutions for simple and more sophisticated design cases. All aspects of the design of a network-on-chip router, including flow control, buffering architectures, arbitration and allocation, as well as pipelined organizations, are presented in detail. The authors provide numerous detailed examples and practical abstract models, when necessary. Router micro-architectural options are presented in a step-by-step manner, beginning from basic design principles. Even highly sophisticated design alternatives are categorized and broken down to simpler pieces that can be understood easily and analyzed. This book is an invaluable reference for system, architecture, circuit, and EDA researchers and developers, who are interested in understanding the overall picture of network-on-chip routers' microarchitecture, the associated design challenges, and the available solutions. · Covers all aspects of the microarchitecture of Network-on-Chip routers; · Justifies and explains every design choice that is presented in a ready-to-use manner following a designer’s perspective; · Describes performance-enhancing features in a step-by-step manner; ·Includes detailed examples presenting the flow of information inside the router on a cycle-by-cycle basis, highlighting the operation of each part under regular or worst-case traffic scenarios.

ISBN: 9781461443018

Standard No.: 10.1007/978-1-4614-4301-8doiSubjects--Topical Terms:

563332
Electronic circuits.

LC Class. No.: TK7888.4

Dewey Class. No.: 621.3815

Microarchitecture of Network-on-Chip Routers = A Designer's Perspective /
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