Jayanthy, S.
Overview
| Works: | 0 works in 0 publications in 0 languages | |
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Titles
Test Generation of Crosstalk Delay Faults in VLSI Circuits
by:
Jayanthy, S.; Bhuvaneswari, M.C.; SpringerLink (Online service)
(Language materials, printed)
, [http://id.loc.gov/vocabulary/relators/aut]