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Test Generation of Crosstalk Delay Faults in VLSI Circuits

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Test Generation of Crosstalk Delay Faults in VLSI Circuits/ by S. Jayanthy, M.C. Bhuvaneswari.
作者:	Jayanthy, S.
其他作者:	Bhuvaneswari, M.C.
面頁冊數:	XI, 156 p. 49 illus., 7 illus. in color.online resource. :
Contained By:	Springer Nature eBook
標題:	Electronic circuits. -
電子資源:	https://doi.org/10.1007/978-981-13-2493-2
ISBN:	9789811324932

Test Generation of Crosstalk Delay Faults in VLSI Circuits
Jayanthy, S.

Test Generation of Crosstalk Delay Faults in VLSI Circuits[electronic resource] /by S. Jayanthy, M.C. Bhuvaneswari. - 1st ed. 2019. - XI, 156 p. 49 illus., 7 illus. in color.online resource.

Chapter 1. Background and Review of Crosstalk Delay Fault Models and the Crosstalk Effects -- Chapter 2. Review of Test Generation Techniques for Crosstalk Delay Faults -- Chapter 3. An Automatic Test Pattern Generation Method for Crosstalk Delay Faults Using Modified PODEM and FAN Algorithm -- Chapter 4. An Automatic Test Pattern Generation Method for Crosstalk Delay Faults using Single-Objective Genetic Algorithm -- Chapter 5. An Automatic Test Pattern Generation Method for Crosstalk Delay Faults Using Single-Objective Particle Swarm Optimization -- Chapter 6. Simulation of Asynchronous Sequential Circuits using Fuzzy Delay Model -- Chapter 7. Simulation Based Test Generation for Crosstalk Delay Faults in Asynchronous Sequential Circuits.

This book describes a variety of test generation algorithms for testing crosstalk delay faults in VLSI circuits. It introduces readers to the various crosstalk effects and describes both deterministic and simulation-based methods for testing crosstalk delay faults. The book begins with a focus on currently available crosstalk delay models, test generation algorithms for delay faults and crosstalk delay faults, before moving on to deterministic algorithms and simulation-based algorithms used to test crosstalk delay faults. Given its depth of coverage, the book will be of interest to design engineers and researchers in the field of VLSI Testing.

ISBN: 9789811324932

Standard No.: 10.1007/978-981-13-2493-2doiSubjects--Topical Terms:

563332
Electronic circuits.

LC Class. No.: TK7888.4

Dewey Class. No.: 621.3815

Test Generation of Crosstalk Delay Faults in VLSI Circuits
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