Juan Chico, Jorge.
概要
| 作品: | 1 作品在 0 項出版品 0 種語言 | |
|---|---|---|
書目資訊
Integrated circuit and system design = power and timing modeling, optimization and simulation : 13th International Workshop, PATMOS 2003, Turin, Italy, September 10-12, 2003 : proceedings /
by:
Juan Chico, Jorge.; Macii, Enrico.; SpringerLink (Online service); Workshop on the Preservation of Stability under Discretization ((2001 :)
(書目-語言資料,印刷品)
Logic-timing simulation and the degradation delay model
by:
Valencia, Manuel.; Bellido, Manuel J., (1964-); Juan Chico, Jorge.; World Scientific (Firm)
(書目-語言資料,印刷品)