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Logic-timing simulation and the degr...
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Valencia, Manuel.
Logic-timing simulation and the degradation delay model
紀錄類型:
書目-語言資料,印刷品 : Monograph/item
正題名/作者:
Logic-timing simulation and the degradation delay model/ Manuel J. Bellido, Jorge Juan, Manuel Valencia.
作者:
Bellido, Manuel J.,
其他作者:
Valencia, Manuel.
出版者:
London :Imperial College Press ; : c2006.,
面頁冊數:
xvii, 267 p. :ill. :
標題:
Metal oxide semiconductors, Complementary. -
電子資源:
http://ebooks.worldscinet.com/ISBN/9781860947360/9781860947360.shtml
ISBN:
1860947360 (electronic bk.)
Logic-timing simulation and the degradation delay model
Bellido, Manuel J.,1964-
Logic-timing simulation and the degradation delay model
[electronic resource] /Manuel J. Bellido, Jorge Juan, Manuel Valencia. - London :Imperial College Press ;c2006. - xvii, 267 p. :ill.
Includes bibliographical references (p. 251-263) and index.
ISBN: 1860947360 (electronic bk.)Subjects--Topical Terms:
596746
Metal oxide semiconductors, Complementary.
Index Terms--Genre/Form:
554714
Electronic books.
Dewey Class. No.: 621.3815
Logic-timing simulation and the degradation delay model
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http://ebooks.worldscinet.com/ISBN/9781860947360/9781860947360.shtml
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