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Security Policy in System-on-Chip De...
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Bhunia, Swarup.
Security Policy in System-on-Chip Designs = Specification, Implementation and Verification /
紀錄類型:
書目-語言資料,印刷品 : Monograph/item
正題名/作者:
Security Policy in System-on-Chip Designs/ by Sandip Ray, Abhishek Basak, Swarup Bhunia.
其他題名:
Specification, Implementation and Verification /
作者:
Ray, Sandip.
其他作者:
Basak, Abhishek.
面頁冊數:
IX, 116 p. 30 illus. in color.online resource. :
Contained By:
Springer Nature eBook
標題:
Electronic circuits. -
電子資源:
https://doi.org/10.1007/978-3-319-93464-8
ISBN:
9783319934648
Security Policy in System-on-Chip Designs = Specification, Implementation and Verification /
Ray, Sandip.
Security Policy in System-on-Chip Designs
Specification, Implementation and Verification /[electronic resource] :by Sandip Ray, Abhishek Basak, Swarup Bhunia. - 1st ed. 2019. - IX, 116 p. 30 illus. in color.online resource.
Chapter1: SoC Security Policies: The State of the Practice -- Chapter2: E-IIPS: A Centralized Policy Implementation Architecture -- Chapter3: Exploiting Design-for-Debug in SoC Security Policy Architecture -- Chapter4: Security Assurance in SoC in presence of Untrusted IP Blocks -- Chapter5: A Move Towards a Hardware Patch -- Chapter6: SoC Security Policy Verification -- Chapter7: SoC Security Policies: Summary and Future Directions.
This book offers readers comprehensive coverage of security policy specification using new policy languages, implementation of security policies in Systems-on-Chip (SoC) – current industrial practice, as well as emerging approaches to architecting SoC security policies and security policy verification. The authors focus on a promising security architecture for implementing security policies, which satisfies the goals of flexibility, verification, and upgradability from the ground up, including a plug-and-play hardware block in which all policy implementations are enclosed. Using this architecture, they discuss the ramifications of designing SoC security policies, including effects on non-functional properties (power/performance), debug, validation, and upgrade. The authors also describe a systematic approach for “hardware patching”, i.e., upgrading hardware implementations of security requirements safely, reliably, and securely in the field, meeting a critical need for diverse Internet of Things (IoT) devices. Provides comprehensive coverage of SoC security requirements, security policies, languages, and security architecture for current and emerging computing devices; Explodes myths and ambiguities in SoC security policy implementations, and provide a rigorous treatment of the subject; Demonstrates a rigorous, step-by-step approach to developing a diversity of SoC security policies; Introduces a rigorous, disciplined approach to “hardware patching”, i.e., secure technique for updating hardware functionality of computing devices in-field; Includes discussion of current and emerging approaches for security policy verification.
ISBN: 9783319934648
Standard No.: 10.1007/978-3-319-93464-8doiSubjects--Topical Terms:
563332
Electronic circuits.
LC Class. No.: TK7888.4
Dewey Class. No.: 621.3815
Security Policy in System-on-Chip Designs = Specification, Implementation and Verification /
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Chapter1: SoC Security Policies: The State of the Practice -- Chapter2: E-IIPS: A Centralized Policy Implementation Architecture -- Chapter3: Exploiting Design-for-Debug in SoC Security Policy Architecture -- Chapter4: Security Assurance in SoC in presence of Untrusted IP Blocks -- Chapter5: A Move Towards a Hardware Patch -- Chapter6: SoC Security Policy Verification -- Chapter7: SoC Security Policies: Summary and Future Directions.
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