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Digital Subsampling Phase Lock Techn...
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Craninckx, Jan.
Digital Subsampling Phase Lock Techniques for Frequency Synthesis and Polar Transmission
紀錄類型:
書目-語言資料,印刷品 : Monograph/item
正題名/作者:
Digital Subsampling Phase Lock Techniques for Frequency Synthesis and Polar Transmission/ by Nereo Markulic, Kuba Raczkowski, Jan Craninckx, Piet Wambacq.
作者:
Markulic, Nereo.
其他作者:
Raczkowski, Kuba.
面頁冊數:
XXIII, 138 p. 97 illus., 23 illus. in color.online resource. :
Contained By:
Springer Nature eBook
標題:
Electronic circuits. -
電子資源:
https://doi.org/10.1007/978-3-030-10958-5
ISBN:
9783030109585
Digital Subsampling Phase Lock Techniques for Frequency Synthesis and Polar Transmission
Markulic, Nereo.
Digital Subsampling Phase Lock Techniques for Frequency Synthesis and Polar Transmission
[electronic resource] /by Nereo Markulic, Kuba Raczkowski, Jan Craninckx, Piet Wambacq. - 1st ed. 2019. - XXIII, 138 p. 97 illus., 23 illus. in color.online resource. - Analog Circuits and Signal Processing,1872-082X. - Analog Circuits and Signal Processing,.
Chapter 1. Introduction -- Chapter 2. A Digital-to-Time Converter based Subsampling PLL for Fractional Synthesis -- Chapter 3. A Background-Calibrated Subsampling PLL for Phase/Frequency Modulation -- Chapter 4. A Background-Calibrated Digital Subsampling Polar Transmitter -- Chapter 5. Conclusion and Future Outlook.
This book explains concepts behind fractional subsampling-based frequency synthesis that is re-shaping today’s art in the field of low-noise LO generation. It covers advanced material, giving clear guidance for development of background-calibrated environments capable of spur-free synthesis and wideband phase modulation. It further expands the concepts into the field of subsampling polar transmission, where the newly developed architecture enables unprecedented spectral efficiency levels, unquestionably required by the upcoming generation of wireless standards. Guides development of DTC-based Fractional-N Subsampling PLL and Subsampling Polar Transmitters, covering material from fundamental theory, over system level considerations to building block IC implementation; Describes a fully background-calibrated environment that can used in general context of fractional frequency synthesis and/or phase/frequency modulation; Presents three IC implementations, showing system level analysis, design methodology, circuit details and measurement results.
ISBN: 9783030109585
Standard No.: 10.1007/978-3-030-10958-5doiSubjects--Topical Terms:
563332
Electronic circuits.
LC Class. No.: TK7888.4
Dewey Class. No.: 621.3815
Digital Subsampling Phase Lock Techniques for Frequency Synthesis and Polar Transmission
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Chapter 1. Introduction -- Chapter 2. A Digital-to-Time Converter based Subsampling PLL for Fractional Synthesis -- Chapter 3. A Background-Calibrated Subsampling PLL for Phase/Frequency Modulation -- Chapter 4. A Background-Calibrated Digital Subsampling Polar Transmitter -- Chapter 5. Conclusion and Future Outlook.
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