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FPGA-BASED Hardware Accelerators

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	FPGA-BASED Hardware Accelerators/ by Iouliia Skliarova, Valery Sklyarov.
作者:	Skliarova, Iouliia.
其他作者:	Sklyarov, Valery.
面頁冊數:	XVI, 245 p.online resource. :
Contained By:	Springer Nature eBook
標題:	Electronic circuits. -
電子資源:	https://doi.org/10.1007/978-3-030-20721-2
ISBN:	9783030207212

FPGA-BASED Hardware Accelerators
Skliarova, Iouliia.

FPGA-BASED Hardware Accelerators[electronic resource] /by Iouliia Skliarova, Valery Sklyarov. - 1st ed. 2019. - XVI, 245 p.online resource. - Lecture Notes in Electrical Engineering,5661876-1100 ;. - Lecture Notes in Electrical Engineering,317.

Reconfigurable devices and design tools -- Architectures of FPGA-based hardware accelerators and design techniques -- Hardware accelerators for data search -- Hardware accelerators for data sort -- FPGA-based hardware accelerators for selected computational problems -- Hardware/software co-design.

This book suggests and describes a number of fast parallel circuits for data/vector processing using FPGA-based hardware accelerators. Three primary areas are covered: searching, sorting, and counting in combinational and iterative networks. These include the application of traditional structures that rely on comparators/swappers as well as alternative networks with a variety of core elements such as adders, logical gates, and look-up tables. The iterative technique discussed in the book enables the sequential reuse of relatively large combinational blocks that execute many parallel operations with small propagation delays. For each type of network discussed, the main focus is on the step-by-step development of the architectures proposed from initial concepts to synthesizable hardware description language specifications. Each type of network is taken through several stages, including modeling the desired functionality in software, the retrieval and automatic conversion of key functions, leading to specifications for optimized hardware modules. The resulting specifications are then synthesized, implemented, and tested in FPGAs using commercial design environments and prototyping boards. The methods proposed can be used in a range of data processing applications, including traditional sorting, the extraction of maximum and minimum subsets from large data sets, communication-time data processing, finding frequently occurring items in a set, and Hamming weight/distance counters/comparators. The book is intended to be a valuable support material for university and industrial engineering courses that involve FPGA-based circuit and system design.

ISBN: 9783030207212

Standard No.: 10.1007/978-3-030-20721-2doiSubjects--Topical Terms:

563332
Electronic circuits.

LC Class. No.: TK7888.4

Dewey Class. No.: 621.3815

FPGA-BASED Hardware Accelerators
LDR:03342nam a22004095i 4500 001 1016112
003 DE-He213
005 20200704174852.0
007 cr nn 008mamaa
008 210106s2019 gw | s |||| 0|eng d
020 $a 9783030207212 $9 978-3-030-20721-2
024 7 $a 10.1007/978-3-030-20721-2 $2 doi
035 $a 978-3-030-20721-2
050 4 $a TK7888.4
072 7 $a TJFC $2 bicssc
072 7 $a TEC008010 $2 bisacsh
072 7 $a TJFC $2 thema
082 0 4 $a 621.3815 $2 23
100 1 $a Skliarova, Iouliia. $4 aut $4 http://id.loc.gov/vocabulary/relators/aut $3 1227182
245 1 0 $a FPGA-BASED Hardware Accelerators $h [electronic resource] / $c by Iouliia Skliarova, Valery Sklyarov.
250 $a 1st ed. 2019.
264 1 $a Cham : $b Springer International Publishing : $b Imprint: Springer, $c 2019.
300 $a XVI, 245 p. $b online resource.
336 $a text $b txt $2 rdacontent
337 $a computer $b c $2 rdamedia
338 $a online resource $b cr $2 rdacarrier
347 $a text file $b PDF $2 rda
490 1 $a Lecture Notes in Electrical Engineering, $x 1876-1100 ; $v 566
505 0 $a Reconfigurable devices and design tools -- Architectures of FPGA-based hardware accelerators and design techniques -- Hardware accelerators for data search -- Hardware accelerators for data sort -- FPGA-based hardware accelerators for selected computational problems -- Hardware/software co-design.
520 $a This book suggests and describes a number of fast parallel circuits for data/vector processing using FPGA-based hardware accelerators. Three primary areas are covered: searching, sorting, and counting in combinational and iterative networks. These include the application of traditional structures that rely on comparators/swappers as well as alternative networks with a variety of core elements such as adders, logical gates, and look-up tables. The iterative technique discussed in the book enables the sequential reuse of relatively large combinational blocks that execute many parallel operations with small propagation delays. For each type of network discussed, the main focus is on the step-by-step development of the architectures proposed from initial concepts to synthesizable hardware description language specifications. Each type of network is taken through several stages, including modeling the desired functionality in software, the retrieval and automatic conversion of key functions, leading to specifications for optimized hardware modules. The resulting specifications are then synthesized, implemented, and tested in FPGAs using commercial design environments and prototyping boards. The methods proposed can be used in a range of data processing applications, including traditional sorting, the extraction of maximum and minimum subsets from large data sets, communication-time data processing, finding frequently occurring items in a set, and Hamming weight/distance counters/comparators. The book is intended to be a valuable support material for university and industrial engineering courses that involve FPGA-based circuit and system design.
650 0 $a Electronic circuits. $3 563332
650 0 $a Computational intelligence. $3 568984
650 1 4 $a Circuits and Systems. $3 670901
650 2 4 $a Computational Intelligence. $3 768837
700 1 $a Sklyarov, Valery. $4 aut $4 http://id.loc.gov/vocabulary/relators/aut $3 1024932
710 2 $a SpringerLink (Online service) $3 593884
773 0 $t Springer Nature eBook
776 0 8 $i Printed edition: $z 9783030207205
776 0 8 $i Printed edition: $z 9783030207229
776 0 8 $i Printed edition: $z 9783030207236
830 0 $a Lecture Notes in Electrical Engineering, $x 1876-1100 ; $v 317 $3 1253457
856 4 0 $u https://doi.org/10.1007/978-3-030-20721-2
912 $a ZDB-2-ENG
912 $a ZDB-2-SXE
950 $a Engineering (SpringerNature-11647)
950 $a Engineering (R0) (SpringerNature-43712)