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How Transistor Area Shrank by 1 Mill...
~
Tigelaar, Howard.
How Transistor Area Shrank by 1 Million Fold
紀錄類型:
書目-語言資料,印刷品 : Monograph/item
正題名/作者:
How Transistor Area Shrank by 1 Million Fold/ by Howard Tigelaar.
作者:
Tigelaar, Howard.
面頁冊數:
XXIV, 319 p. 263 illus., 202 illus. in color.online resource. :
Contained By:
Springer Nature eBook
標題:
Logic Design. -
電子資源:
https://doi.org/10.1007/978-3-030-40021-7
ISBN:
9783030400217
How Transistor Area Shrank by 1 Million Fold
Tigelaar, Howard.
How Transistor Area Shrank by 1 Million Fold
[electronic resource] /by Howard Tigelaar. - 1st ed. 2020. - XXIV, 319 p. 263 illus., 202 illus. in color.online resource.
Introduction -- Overview -- Semiconductors and Insulators -- Diodes, MOS Transistors, Bipolar Transistors, Inverters -- Building High Performance MOS Transistors -- Parasitic MOS and Bipolar Transistors -- Design Rules and Photo Patterns -- CMOS Inverter Process Flow -- Key Inventions & Developments that Enabled Scaling -- Process Flow with Histories of Scaling at Key Steps.
This book explains in layman’s terms how CMOS transistors work. The author explains step-by-step how CMOS transistors are built, along with an explanation of the purpose of each process step. He describes for readers the key inventions and developments in science and engineering that overcame huge obstacles, enabling engineers to shrink transistor area by over 1 million fold and build billions of transistor switches that switch over a billion times a second, all on a piece of silicon smaller than a thumbnail. Written from a process integration point of view, in language accessible to a wide variety of readers; Provides readers with an understanding of how transistors work, how they are built, and the equipment used to build them; Describes the incredible science and engineering that was developed to keep transistor scaling on a Moore’s Law trajectory – (transistor area reduced by half every 2 to 3 years); Enables readers to understand the engineering choices and compromises made while scaling transistors ever smaller, with the constraints that they switch ever faster and use less and less power.
ISBN: 9783030400217
Standard No.: 10.1007/978-3-030-40021-7doiSubjects--Topical Terms:
670915
Logic Design.
LC Class. No.: QC1-999
Dewey Class. No.: 621
How Transistor Area Shrank by 1 Million Fold
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Introduction -- Overview -- Semiconductors and Insulators -- Diodes, MOS Transistors, Bipolar Transistors, Inverters -- Building High Performance MOS Transistors -- Parasitic MOS and Bipolar Transistors -- Design Rules and Photo Patterns -- CMOS Inverter Process Flow -- Key Inventions & Developments that Enabled Scaling -- Process Flow with Histories of Scaling at Key Steps.
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