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Nanoscale Electrical and Thermal Interfaces to Resistive Memory Devices.

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Nanoscale Electrical and Thermal Interfaces to Resistive Memory Devices./
作者:	Deshmukh, Sanchit Kiran.
出版者:	Ann Arbor : ProQuest Dissertations & Theses, : 2020,
面頁冊數:	128 p.
附註:	Source: Dissertations Abstracts International, Volume: 82-02, Section: B.
Contained By:	Dissertations Abstracts International82-02B.
標題:	Computer engineering. -
電子資源:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=28103898
ISBN:	9798662510272

Nanoscale Electrical and Thermal Interfaces to Resistive Memory Devices.
Deshmukh, Sanchit Kiran.

Nanoscale Electrical and Thermal Interfaces to Resistive Memory Devices. - Ann Arbor : ProQuest Dissertations & Theses, 2020 - 128 p.

Source: Dissertations Abstracts International, Volume: 82-02, Section: B.

Thesis (Ph.D.)--Stanford University, 2020.

This item must not be sold to any third party vendors.

Future computing systems need ultra-high storage densities for large volumes of data. Non-volatile resistive random-access memory (RRAM) based on metal oxides or phase-change materials could enable such high capacity with low latency. However, as memory cell dimensions are reduced to sub-10 nm scale, their contacts, interfaces, and self-heating can determine the memory device behavior and packing density, yet these are poorly understood. In the first half of my thesis, I will show that the electrical contact resistivity varies over 10 orders of magnitude depending on the memory material considered; cubic Ge2Sb2Te5 has contact resistivity near 10 mΩ⋅cm2 while contact resistivity to as-deposited HfO2 is as high as 0.5 MΩ⋅cm2, at room temperature. I will then showcase switching measurements on nanoscale memory devices and insights gleaned about the role of contact resistance. In the second half of my thesis, I will demonstrate some of the first nanoscale thermal measurements on resistive memory devices using scanning thermal microscopy. With a single-layer graphene as a top electrode, I show the most thermally intimate measurement of an RRAM filament to date and observe a device temperature rise > 300°C. Varying the thermal conductivity of electrodes over a 50x range, I investigate device-level heat spreading and conclude that Joule heating in a sub-10 nm filament can cause a temperature rise up to 200°C, even at a distance of 50 nm from a typical RRAM device. By comparison to simulations, I show that the filament itself can reach temperatures in excess of 1200°C within its hourglass-like sub-10 nm dimension geometry. This filament temperature strongly depends on the thermal boundary resistance at the filament-electrode interfaces. These novel insights point to the importance of nanoscale thermal engineering of the filament-electrode interfaces and of the electrodes to minimize array level thermal cross-talk and to enable ultra-high storage densities.

ISBN: 9798662510272Subjects--Topical Terms:

569006
Computer engineering.
Subjects--Index Terms:

Resistive random-access memory

Nanoscale Electrical and Thermal Interfaces to Resistive Memory Devices.
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520 $a Future computing systems need ultra-high storage densities for large volumes of data. Non-volatile resistive random-access memory (RRAM) based on metal oxides or phase-change materials could enable such high capacity with low latency. However, as memory cell dimensions are reduced to sub-10 nm scale, their contacts, interfaces, and self-heating can determine the memory device behavior and packing density, yet these are poorly understood. In the first half of my thesis, I will show that the electrical contact resistivity varies over 10 orders of magnitude depending on the memory material considered; cubic Ge2Sb2Te5 has contact resistivity near 10 mΩ⋅cm2 while contact resistivity to as-deposited HfO2 is as high as 0.5 MΩ⋅cm2, at room temperature. I will then showcase switching measurements on nanoscale memory devices and insights gleaned about the role of contact resistance. In the second half of my thesis, I will demonstrate some of the first nanoscale thermal measurements on resistive memory devices using scanning thermal microscopy. With a single-layer graphene as a top electrode, I show the most thermally intimate measurement of an RRAM filament to date and observe a device temperature rise > 300°C. Varying the thermal conductivity of electrodes over a 50x range, I investigate device-level heat spreading and conclude that Joule heating in a sub-10 nm filament can cause a temperature rise up to 200°C, even at a distance of 50 nm from a typical RRAM device. By comparison to simulations, I show that the filament itself can reach temperatures in excess of 1200°C within its hourglass-like sub-10 nm dimension geometry. This filament temperature strongly depends on the thermal boundary resistance at the filament-electrode interfaces. These novel insights point to the importance of nanoscale thermal engineering of the filament-electrode interfaces and of the electrodes to minimize array level thermal cross-talk and to enable ultra-high storage densities.
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