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Logic Synthesis for VLSI-Based Combined Finite State Machines = Synthesis Targeting ASICs, CPLDs and FPGAs /

Record Type:	Language materials, printed : Monograph/item
Title/Author:	Logic Synthesis for VLSI-Based Combined Finite State Machines/ by Alexander Barkalov, Larysa Titarenko, Kamil Mielcarek, Małgorzata Mazurkiewicz, Elżbieta Kawecka.
Reminder of title:	Synthesis Targeting ASICs, CPLDs and FPGAs /
Author:	Barkalov, Alexander.
other author:	Titarenko, Larysa.
Description:	XV, 291 p. 270 illus.online resource. :
Contained By:	Springer Nature eBook
Subject:	Electronic circuits. -
Online resource:	https://doi.org/10.1007/978-3-031-16027-1
ISBN:	9783031160271

Logic Synthesis for VLSI-Based Combined Finite State Machines = Synthesis Targeting ASICs, CPLDs and FPGAs /
Barkalov, Alexander.

Logic Synthesis for VLSI-Based Combined Finite State MachinesSynthesis Targeting ASICs, CPLDs and FPGAs /[electronic resource] :by Alexander Barkalov, Larysa Titarenko, Kamil Mielcarek, Małgorzata Mazurkiewicz, Elżbieta Kawecka. - 1st ed. 2022. - XV, 291 p. 270 illus.online resource. - Lecture Notes in Electrical Engineering,9221876-1119 ;. - Lecture Notes in Electrical Engineering,317.

Control algorithms and finite state machines -- VLSI-based logic synthesis -- ASIC-based synthesis of CFSMs -- Optimization of ASIC-based CFSMs -- Homogenous CPLD-based synthesis of CFSMs.

The book is devoted to design and optimization of control units represented by combined finite state machines (CFSMs). The CFSMs combine features of both Mealy and Moore FSMs. Having states of Moore FSM, they produce output signals of both Mealy and Moore types. To optimize the circuits of CFSMs, we propose to use optimization methods targeting both Mealy and Moore FSMs. The book contains some original synthesis and optimization methods targeting hardware reduction in VLSI-based CFSM circuits. These methods take into account the peculiarities of both a CFSM model and a VLSI chip in use. The optimization is achieved due to combining classical optimization methods with new methods proposed in this book. These new methods are a mixed encoding of collections of microoperations and a twofold state assignment in CFSMs. All proposed methods target reducing the numbers of arguments in systems of Boolean functions representing CFSM circuits. Also, we propose to use classes of pseudoequivalent states of Moore FSMs to reduce the number of product terms in these systems.The book includes a lot of examples which contributes to a better understanding of the features of the synthesis methods under consideration. This is the first book entirely devoted to the problems associated with synthesis and optimization of VLSI-based CFSMs. We hope that the book will be interesting and useful for students and PhD students in the area of Computer Science, as well as for designers of various digital systems. We think that proposed CFSM models enlarge the class of models applied for implementation of control units with modern VLSI chips. .

ISBN: 9783031160271

Standard No.: 10.1007/978-3-031-16027-1doiSubjects--Topical Terms:

563332
Electronic circuits.

LC Class. No.: TK7867-7867.5

Dewey Class. No.: 621.3815

Logic Synthesis for VLSI-Based Combined Finite State Machines = Synthesis Targeting ASICs, CPLDs and FPGAs /
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