國立虎尾科技大學 |

The Read-Out Controller ASIC for the ATLAS Experiment at LHC

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	The Read-Out Controller ASIC for the ATLAS Experiment at LHC/ by Stefan Popa.
作者:	Popa, Stefan.
面頁冊數:	XVIII, 198 p. 80 illus., 56 illus. in color.online resource. :
Contained By:	Springer Nature eBook
標題:	Electronics and Microelectronics, Instrumentation. -
電子資源:	https://doi.org/10.1007/978-3-031-18074-3
ISBN:	9783031180743

The Read-Out Controller ASIC for the ATLAS Experiment at LHC
Popa, Stefan.

The Read-Out Controller ASIC for the ATLAS Experiment at LHC[electronic resource] /by Stefan Popa. - 1st ed. 2022. - XVIII, 198 p. 80 illus., 56 illus. in color.online resource. - Springer Theses, Recognizing Outstanding Ph.D. Research,2190-5061. - Springer Theses, Recognizing Outstanding Ph.D. Research,.

Introduction -- The Read-Out Controller -- ROC Testing -- Immunity to Radiation-Induced Faults -- An application -- Conclusions -- Appendices.

This thesis presents the complete chain from specifications to real-life deployment of the Read Out Controller (ROC) ASIC for the ATLAS Experiment at LHC, including the design of the FPGA-based setup used for prototype validation and mass testing of the approximately 6000 chips. Long-lasting experiments like the ATLAS at the LHC undergo regular upgrades to improve their performance over time. One of such upgrades of the ATLAS was the replacement of a fraction of muon detectors in the forward rapidities to provide much-improved reconstruction precision and discrimination from background protons. This new instrumentation (New Small Wheel) is equipped with custom-designed, radiation-hard, on-detector electronics with the Read Out Controller chip being a mission-critical element. The chip acts as a clock and control signals distributor and a concentrator, buffer, filter and real-time processor of detector data packets. The described and deployed FPGA-based test setup emulates the asynchronous chip context and employs optimizations and automatic clock and data synchronization. The chip's tolerance to nuclear radiation was evaluated by recording its operation while controlled ultrafast neutron beams were incident to its silicon die. Predictions for the operating environment are made. A proposed implementation of an FPGA Integrated Logic Analyzer that mitigates the observed limitations and constraints of the existing ones is included.

ISBN: 9783031180743

Standard No.: 10.1007/978-3-031-18074-3doiSubjects--Topical Terms:

670219
Electronics and Microelectronics, Instrumentation.

LC Class. No.: T50

Dewey Class. No.: 530.8

The Read-Out Controller ASIC for the ATLAS Experiment at LHC
LDR:03081nam a22004335i 4500 001 1086521
003 DE-He213
005 20221217205853.0
007 cr nn 008mamaa
008 221228s2022 sz | s |||| 0|eng d
020 $a 9783031180743 $9 978-3-031-18074-3
024 7 $a 10.1007/978-3-031-18074-3 $2 doi
035 $a 978-3-031-18074-3
050 4 $a T50
050 4 $a QC100.5-.8
072 7 $a PDDM $2 bicssc
072 7 $a TEC022000 $2 bisacsh
072 7 $a PDD $2 thema
082 0 4 $a 530.8 $2 23
082 0 4 $a 530.7 $2 23
100 1 $a Popa, Stefan. $e author. $4 aut $4 http://id.loc.gov/vocabulary/relators/aut $3 1393325
245 1 4 $a The Read-Out Controller ASIC for the ATLAS Experiment at LHC $h [electronic resource] / $c by Stefan Popa.
250 $a 1st ed. 2022.
264 1 $a Cham : $b Springer International Publishing : $b Imprint: Springer, $c 2022.
300 $a XVIII, 198 p. 80 illus., 56 illus. in color. $b online resource.
336 $a text $b txt $2 rdacontent
337 $a computer $b c $2 rdamedia
338 $a online resource $b cr $2 rdacarrier
347 $a text file $b PDF $2 rda
490 1 $a Springer Theses, Recognizing Outstanding Ph.D. Research, $x 2190-5061
505 0 $a Introduction -- The Read-Out Controller -- ROC Testing -- Immunity to Radiation-Induced Faults -- An application -- Conclusions -- Appendices.
520 $a This thesis presents the complete chain from specifications to real-life deployment of the Read Out Controller (ROC) ASIC for the ATLAS Experiment at LHC, including the design of the FPGA-based setup used for prototype validation and mass testing of the approximately 6000 chips. Long-lasting experiments like the ATLAS at the LHC undergo regular upgrades to improve their performance over time. One of such upgrades of the ATLAS was the replacement of a fraction of muon detectors in the forward rapidities to provide much-improved reconstruction precision and discrimination from background protons. This new instrumentation (New Small Wheel) is equipped with custom-designed, radiation-hard, on-detector electronics with the Read Out Controller chip being a mission-critical element. The chip acts as a clock and control signals distributor and a concentrator, buffer, filter and real-time processor of detector data packets. The described and deployed FPGA-based test setup emulates the asynchronous chip context and employs optimizations and automatic clock and data synchronization. The chip's tolerance to nuclear radiation was evaluated by recording its operation while controlled ultrafast neutron beams were incident to its silicon die. Predictions for the operating environment are made. A proposed implementation of an FPGA Integrated Logic Analyzer that mitigates the observed limitations and constraints of the existing ones is included.
650 2 4 $a Electronics and Microelectronics, Instrumentation. $3 670219
650 2 4 $a Particle Physics. $3 1366292
650 1 4 $a Measurement Science and Instrumentation. $3 769080
650 0 $a Electronics. $3 596389
650 0 $a Particles (Nuclear physics). $3 1366291
650 0 $a Measuring instruments. $3 632476
650 0 $a Measurement. $3 572905
710 2 $a SpringerLink (Online service) $3 593884
773 0 $t Springer Nature eBook
776 0 8 $i Printed edition: $z 9783031180736
776 0 8 $i Printed edition: $z 9783031180750
776 0 8 $i Printed edition: $z 9783031180767
830 0 $a Springer Theses, Recognizing Outstanding Ph.D. Research, $x 2190-5053 $3 1253569
856 4 0 $u https://doi.org/10.1007/978-3-031-18074-3
912 $a ZDB-2-PHA
912 $a ZDB-2-SXP
950 $a Physics and Astronomy (SpringerNature-11651)
950 $a Physics and Astronomy (R0) (SpringerNature-43715)