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Resource efficient LDPC decoders = from algorithms to hardware architectures /
Record Type:
Language materials, printed : Monograph/item
Title/Author:
Resource efficient LDPC decoders/ Vikram Arkalgud Chandrasetty.
Reminder of title:
from algorithms to hardware architectures /
Author:
Chandrasetty, Vikram Arkalgud.
other author:
Aziz, Sayed Mahfuzul.
Published:
Amsterdam :Academic Press, : 2018.,
Description:
1 online resource.
Subject:
Decoders (Electronics) -
Online resource:
https://www.sciencedirect.com/science/book/9780128112557
ISBN:
9780128112564 (electronic bk.)
Resource efficient LDPC decoders = from algorithms to hardware architectures /
Chandrasetty, Vikram Arkalgud.
Resource efficient LDPC decoders
from algorithms to hardware architectures /[electronic resource] :Vikram Arkalgud Chandrasetty. - Amsterdam :Academic Press,2018. - 1 online resource.
Includes bibliographical references and index.
1.Introduction 2. Overview of LDPC codes 3. Structure and flexibility of LDPC codes 4. LDPC decoding algorithms 5. LDPC decoder architectures 6. Hardware implementation of LDPC decoder 7. LDPC decoders in multimedia communication References 8. Prospective LDPC applications Appendix-A : Sample C-Programs and MATLAB models for LDPC code construction and simulation Appendix-B : Sample Verilog HDL codes for implementation of fully-parallel LDPC decoder architecture Appendix-C : Sample Verilog HDL codes for implementation of partially-parallel LDPC decoder architecture.
ISBN: 9780128112564 (electronic bk.)
Nat. Bib. No.: GBB7M5430bnbSubjects--Topical Terms:
1063309
Decoders (Electronics)
Index Terms--Genre/Form:
554714
Electronic books.
LC Class. No.: TK7872.D37
Dewey Class. No.: 621.38932
Resource efficient LDPC decoders = from algorithms to hardware architectures /
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1.Introduction 2. Overview of LDPC codes 3. Structure and flexibility of LDPC codes 4. LDPC decoding algorithms 5. LDPC decoder architectures 6. Hardware implementation of LDPC decoder 7. LDPC decoders in multimedia communication References 8. Prospective LDPC applications Appendix-A : Sample C-Programs and MATLAB models for LDPC code construction and simulation Appendix-B : Sample Verilog HDL codes for implementation of fully-parallel LDPC decoder architecture Appendix-C : Sample Verilog HDL codes for implementation of partially-parallel LDPC decoder architecture.
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https://www.sciencedirect.com/science/book/9780128112557
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