國立虎尾科技大學 |

Designing digital computing systems with Verilog /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Designing digital computing systems with Verilog // David J. Lilja and Sachin S. Sapatnekar.
作者:	Lilja, David J.,
其他作者:	Sapatnekar, Sachin S.,
面頁冊數:	1 online resource (ix, 160 pages) :digital, PDF file(s). :
附註:	Title from publisher's bibliographic system (viewed on 05 Oct 2015).
標題:	Electronic digital computers - Design and construction. -
電子資源:	https://doi.org/10.1017/CBO9780511607059
ISBN:	9780511607059 (ebook)

Designing digital computing systems with Verilog /
Lilja, David J.,

Designing digital computing systems with Verilog /David J. Lilja and Sachin S. Sapatnekar. - 1 online resource (ix, 160 pages) :digital, PDF file(s).

Title from publisher's bibliographic system (viewed on 05 Oct 2015).

This book serves both as an introduction to computer architecture and as a guide to using a hardware description language (HDL) to design, model and simulate real digital systems. The book starts with an introduction to Verilog - the HDL chosen for the book since it is widely used in industry and straightforward to learn. Next, the instruction set architecture (ISA) for the simple VeSPA (Very Small Processor Architecture) processor is defined - this is a real working device that has been built and tested at the University of Minnesota by the authors. The VeSPA ISA is used throughout the remainder of the book to demonstrate how behavioural and structural models can be developed and intermingled in Verilog. Although Verilog is used throughout, the lessons learned will be equally applicable to other HDLs. Written for senior and graduate students, this book is also an ideal introduction to Verilog for practising engineers.

ISBN: 9780511607059 (ebook)Subjects--Topical Terms:

563916
Electronic digital computers
--Design and construction.

LC Class. No.: TK7885.7 / .L55 2005

Dewey Class. No.: 621.39/2

Designing digital computing systems with Verilog /
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