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Optimization and Fabrication of Semiconductor Power Devices on 4H-SiC.

紀錄類型:	書目-語言資料,手稿 : Monograph/item
正題名/作者:	Optimization and Fabrication of Semiconductor Power Devices on 4H-SiC./
作者:	Lynch, Justin M.
面頁冊數:	1 online resource (289 pages)
附註:	Source: Dissertations Abstracts International, Volume: 85-10, Section: B.
Contained By:	Dissertations Abstracts International85-10B.
標題:	Nanoscience. -
電子資源:	click for full text (PQDT)
ISBN:	9798382318585

Optimization and Fabrication of Semiconductor Power Devices on 4H-SiC.
Lynch, Justin M.

Optimization and Fabrication of Semiconductor Power Devices on 4H-SiC. - 1 online resource (289 pages)

Source: Dissertations Abstracts International, Volume: 85-10, Section: B.

Thesis (Ph.D.)--State University of New York at Albany, 2024.

Includes bibliographical references

The work presented in this document focuses on the design, optimization, and fabrication of power devices on 4H-Silicon Carbide (SiC) substrates. Power devices convert or control electric power flow and are the main components of electronic power systems worldwide. Power electronic systems are used in both low-power and high-power settings, including prevalent applications such as fast charging set-ups for personal electronic devices, electric vehicle motor drives, and renewable energy storage and grid connections. With a wide spread of applications and the further electrification of our society on the horizon, it is crucial to minimize the power loss of power electronic systems and contribute to a more energy-efficient world. To achieve more efficient power electronic systems, the heart of the electronic system, the power device, must be optimized. Silicon (Si) power devices dominate the market for low-power applications with efficient device design and fabrication. As the power need increases for 600 V and above rated applications, Si devices are still being employed, but due to the material properties of the substrate, their energy efficiency has reached its limit. Here, the use of the wide-bandgap material 4H-SiC power devices has become an excellent choice to replace their Si counterpart, as they offer the potential for reduced power loss and robust device operation. As the use of 4H-SiC power devices becomes more and more prevalent in power electronic systems ranging from 600 V to 20 kV applications, it is imperative to continue to improve their device performance and ease of fabrication and implementation.For use in high voltage-rated applications, power devices must be designed and fabricated to withstand high voltages and minimize power loss. To achieve the high breakdown voltages of the device, special care must be taken in the design of the device's drift region or voltage-supporting region. The drift region must be optimized to support the required voltage and minimize its contribution to power loss during typical device operation. In 4H-SiC, due to superior material properties, the drift layer can be designed thinner and more heavily doped to support a specified voltage compared to its Si counterpart. This allows devices fabricated on 4H-SiC to have reduced power loss generated from its drift region and reinforces the merit of using these devices in applications of 600 V and above where large drift regions contribute heavily to the overall resistance of the device. Once the drift region of the device is optimized, the cell structure of the power device needs to be appropriately designed to ensure efficient and robust device performance and an effective edge termination scheme is required to harness the full potential of the drift region. Continued device optimization is essential for advances and improvement in 4H-SiC power devices.Once a power device is designed for efficient and reliable operation on 4H-SiC, the next crucial step for implementing these devices in real-world applications is the affordable fabrication of the device. Using 4H-SiC substrates for device fabrication allows for implementing many of the fabrication techniques used for Si substrates. However, some areas still differ, including substrate growth, activation anneal, and ion implantation technique. Ion implantation is crucial for power device fabrication as it is used to selectively form the p-n junctions located in the device, which are used to support voltage and control the current path within the devices. In Si, the p-n junctions formed for device operation are formed using low-energy ion implantation and subsequent diffusion of the dopant ions. In 4H-SiC, this process is not feasible due to the inability to diffuse dopants. Instead, high energy and dose ion implantations form the deep and high concentration junctions required for efficient power device operation in 4H-SiC. This causes damage to the crystal structure of the SiC and defects that negatively affect device operation. In typical device fabrication today, this ion implantation technique is carried out at high temperatures to cure the damage caused by the implants, which raises the thermal budget of the device fabrication and requires unique high-temperature ion implantation tools. Complete investigations of ion implantation techniques used for 4H-SiC power devices are imperative for improving fabrication techniques and possibly lowering the barrier for 4H-SiC power device implementation.The details of the optimization of device structure and fabrication techniques of 600 V to 20 kV 4H-SiC power devices are discussed below in this dissertation. In addition, electrical characteristics from fabricated devices are presented and analyzed. An introduction to power devices and background on 4H-SiC power device basics, including material properties, drift layer design, edge termination strategies, and ion implantation in SiC, is presented. Following that, low-voltage 4H-SiC power devices are discussed. First, an overview of 600 V diodes fabricated in student cleanrooms is given, focusing on ion implantation techniques and ways to improve the fabrication process of 4H-SiC power devices. Then, the design and optimization of 1.2 kV Junction Field Effect Transistors (JFETs) and an innovative structure that offers industry competitive electrical results are presented.After the low voltage (600 V-1.2 kV) devices are discussed, a look into medium (6.5 kV) and high voltage (10 kV-20 kV) 4H-SiC power devices is presented. Replacing multi-chip Si power electronic systems with single-chip high-voltage SiC electronic systems is advantageous for reducing size, weight, cost, and efficiency in high-power applications. Large and lightly doped drift regions and efficient edge termination are needed for high-voltage devices to block the required voltage. With a limited supply of high-voltage wafers available, limited research exists on optimizing and demonstrating reliable, rugged, and efficient high-voltage 4H-SiC power devices. This work will show the fabrication challenges and optimization processes of these high-voltage devices and introduce new device structures. The complete design and optimization process of 6.5 kV MOSFETs is shown, along with new structures and device designs emphasizing improvements in dynamic performance and reliability. A look into unique design challenges faced by high voltage (>10 kV) power devices is presented, as well as the fabrication, design, and electrical analysis of 15 kV MOSFETs and 20 kV PiN diodes.

Electronic reproduction.
Ann Arbor, Mich. :
ProQuest,
2024

Mode of access: World Wide Web

ISBN: 9798382318585Subjects--Topical Terms:

632473
Nanoscience.
Subjects--Index Terms:

DiodesIndex Terms--Genre/Form:

554714
Electronic books.

Optimization and Fabrication of Semiconductor Power Devices on 4H-SiC.
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As the power need increases for 600 V and above rated applications, Si devices are still being employed, but due to the material properties of the substrate, their energy efficiency has reached its limit. Here, the use of the wide-bandgap material 4H-SiC power devices has become an excellent choice to replace their Si counterpart, as they offer the potential for reduced power loss and robust device operation. As the use of 4H-SiC power devices becomes more and more prevalent in power electronic systems ranging from 600 V to 20 kV applications, it is imperative to continue to improve their device performance and ease of fabrication and implementation.For use in high voltage-rated applications, power devices must be designed and fabricated to withstand high voltages and minimize power loss. To achieve the high breakdown voltages of the device, special care must be taken in the design of the device's drift region or voltage-supporting region. The drift region must be optimized to support the required voltage and minimize its contribution to power loss during typical device operation. In 4H-SiC, due to superior material properties, the drift layer can be designed thinner and more heavily doped to support a specified voltage compared to its Si counterpart. This allows devices fabricated on 4H-SiC to have reduced power loss generated from its drift region and reinforces the merit of using these devices in applications of 600 V and above where large drift regions contribute heavily to the overall resistance of the device. Once the drift region of the device is optimized, the cell structure of the power device needs to be appropriately designed to ensure efficient and robust device performance and an effective edge termination scheme is required to harness the full potential of the drift region. Continued device optimization is essential for advances and improvement in 4H-SiC power devices.Once a power device is designed for efficient and reliable operation on 4H-SiC, the next crucial step for implementing these devices in real-world applications is the affordable fabrication of the device. Using 4H-SiC substrates for device fabrication allows for implementing many of the fabrication techniques used for Si substrates. However, some areas still differ, including substrate growth, activation anneal, and ion implantation technique. Ion implantation is crucial for power device fabrication as it is used to selectively form the p-n junctions located in the device, which are used to support voltage and control the current path within the devices. In Si, the p-n junctions formed for device operation are formed using low-energy ion implantation and subsequent diffusion of the dopant ions. In 4H-SiC, this process is not feasible due to the inability to diffuse dopants. Instead, high energy and dose ion implantations form the deep and high concentration junctions required for efficient power device operation in 4H-SiC. This causes damage to the crystal structure of the SiC and defects that negatively affect device operation. In typical device fabrication today, this ion implantation technique is carried out at high temperatures to cure the damage caused by the implants, which raises the thermal budget of the device fabrication and requires unique high-temperature ion implantation tools. Complete investigations of ion implantation techniques used for 4H-SiC power devices are imperative for improving fabrication techniques and possibly lowering the barrier for 4H-SiC power device implementation.The details of the optimization of device structure and fabrication techniques of 600 V to 20 kV 4H-SiC power devices are discussed below in this dissertation. In addition, electrical characteristics from fabricated devices are presented and analyzed. An introduction to power devices and background on 4H-SiC power device basics, including material properties, drift layer design, edge termination strategies, and ion implantation in SiC, is presented. Following that, low-voltage 4H-SiC power devices are discussed. First, an overview of 600 V diodes fabricated in student cleanrooms is given, focusing on ion implantation techniques and ways to improve the fabrication process of 4H-SiC power devices. Then, the design and optimization of 1.2 kV Junction Field Effect Transistors (JFETs) and an innovative structure that offers industry competitive electrical results are presented.After the low voltage (600 V-1.2 kV) devices are discussed, a look into medium (6.5 kV) and high voltage (10 kV-20 kV) 4H-SiC power devices is presented. Replacing multi-chip Si power electronic systems with single-chip high-voltage SiC electronic systems is advantageous for reducing size, weight, cost, and efficiency in high-power applications. Large and lightly doped drift regions and efficient edge termination are needed for high-voltage devices to block the required voltage. With a limited supply of high-voltage wafers available, limited research exists on optimizing and demonstrating reliable, rugged, and efficient high-voltage 4H-SiC power devices. This work will show the fabrication challenges and optimization processes of these high-voltage devices and introduce new device structures. The complete design and optimization process of 6.5 kV MOSFETs is shown, along with new structures and device designs emphasizing improvements in dynamic performance and reliability. A look into unique design challenges faced by high voltage (>10 kV) power devices is presented, as well as the fabrication, design, and electrical analysis of 15 kV MOSFETs and 20 kV PiN diodes.
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