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Chip design for submicron VLSI : CMO...
~
Uyemura, John P. (1952-)
Chip design for submicron VLSI : CMOS layout and simulation
Record Type:
Language materials, printed : monographic
Title Information:
CMOS layout and simulation
Author:
UyemuraJohn P., 1952-
Place of Publication:
Toronto
Published:
Thomson/Nelson;
Year of Publication:
c2006.
Description:
xvi, 411 p.ill. : 25 cm. ; 1 CD-ROM (4 3/4 in.)+
Subject:
Integrated circuits - Very large scale integration -
Subject:
Metal oxide semiconductors, Complementary - Design and construction. -
Notes:
Includes bibliographical references and index.
ISBN:
053446629X
Chip design for submicron VLSI : CMOS layout and simulation
Uyemura, John P.
Chip design for submicron VLSI
: CMOS layout and simulation / John P. Uyemura. - Toronto : Thomson/Nelson, c2006.. - xvi, 411 p. ; ill. ; 25 cm. .
Includes bibliographical references and index.Minimum system requirements: Windows 98SE, XP, 2000 or NT; 64 MB system RAM; Pentium or compatible CPU..
ISBN 053446629X
Integrated circuitsMetal oxide semiconductors, Complementary -- Very large scale integration -- Design and construction.
Chip design for submicron VLSI : CMOS layout and simulation
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