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RTL hardware design using VHDL = coding for efficiency, portability, and scalability /
紀錄類型:
書目-語言資料,印刷品 : Monograph/item
正題名/作者:
RTL hardware design using VHDL/ Pong P. Chu.
其他題名:
coding for efficiency, portability, and scalability /
作者:
Chu, Pong P.,
出版者:
Hoboken, N.J. :Wiley-Interscience, : c2006.,
面頁冊數:
1 online resource (xxiii, 669 p.) :ill. :
標題:
Digital electronics - Data processing. -
電子資源:
http://ieeexplore.ieee.org/xpl/bkabstractplus.jsp?bkn=5237648
ISBN:
0471720925 (alk. paper)
RTL hardware design using VHDL = coding for efficiency, portability, and scalability /
Chu, Pong P.,1959-
RTL hardware design using VHDL
coding for efficiency, portability, and scalability /[electronic resource] :Pong P. Chu. - Hoboken, N.J. :Wiley-Interscience,c2006. - 1 online resource (xxiii, 669 p.) :ill.
Includes bibliographical references (p. 665-666) and index.
Introduction to digital system design -- Overview of hardware description languages -- Basic language constructs of VHDL -- Concurrent signal assignment statements of VHDL -- Sequential statements of VHDL -- Synthesis of VHDL code -- Combinational circuit design : practice -- Sequential circuit design : principle -- Sequential circuit design : practice -- Finite state machine : principle and practice -- Register transfer methodology : principle -- Register transfer methodology : practice -- Hierarchical design in VHDL -- Parameterized design : principle -- Parameterized design : practice -- Clock and synchronization : principle and practice.
ISBN: 0471720925 (alk. paper)
Standard No.: 10.1002/0471786411doiSubjects--Topical Terms:
632776
Digital electronics
--Data processing.
LC Class. No.: TK7868.D5 / C46 2006
Dewey Class. No.: 621.39/2
RTL hardware design using VHDL = coding for efficiency, portability, and scalability /
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