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Tradeoffs and optimization in analog...

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Binkley, David M.

Tradeoffs and optimization in analog CMOS design /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Tradeoffs and optimization in analog CMOS design // David M. Binkley.
作者:	Binkley, David M.
出版者:	Chichester, England ;John Wiley & Sons, : c2008.,
面頁冊數:	xxxv, 594 p. ;25 cm.;
標題:	Metal oxide semiconductors, Complementary - Design and construction. -
ISBN:	0470031360 (cloth) :

Tradeoffs and optimization in analog CMOS design /
Binkley, David M.

Tradeoffs and optimization in analog CMOS design /David M. Binkley. - Chichester, England ;John Wiley & Sons,c2008. - xxxv, 594 p. ;25 cm.

Includes bibliographical references and index.

ISBN: 0470031360 (cloth) :NT3969

LCCN: 2007037318Subjects--Topical Terms:

564465
Metal oxide semiconductors, Complementary
--Design and construction.

LC Class. No.: TK7871.99.M44 / B56 2008

Dewey Class. No.: 621.3815/2

Tradeoffs and optimization in analog CMOS design /
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008 111103s2008 enk b 001 0 eng
010 $a 2007037318
020 $a 0470031360 (cloth) : $c NT3969
020 $a 9780470031360 (cloth)
035 $a (OCoLC)ocn171152288
035 $a 15001085
040 $a DLC $c DLC $d YDXCP $d BAKER $d BTCTA $d BWKUK $d BWK $d CDX $d BWX $d IXA $d DLC $d NFU
041 0 # $a eng
050 0 0 $a TK7871.99.M44 $b B56 2008
082 0 0 $a 621.3815/2 $2 22
100 1 $a Binkley, David M. $3 779611
245 1 0 $a Tradeoffs and optimization in analog CMOS design / $c David M. Binkley.
260 # $a Chichester, England ; $a Hoboken, NJ : $c c2008. $b John Wiley & Sons,
300 $a xxxv, 594 p. ; $c 25 cm.
504 $a Includes bibliographical references and index.
650 # 0 $a Metal oxide semiconductors, Complementary $x Design and construction. $3 564465

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