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System level design model with reuse...

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System level design model with reuse of system IP

Record Type:	Language materials, printed : Monograph/item
Title/Author:	System level design model with reuse of system IP/ edited by Patrizia Cavalloro ... [et al.].
other author:	Cavalloro, Patrizia.
Published:	Boston :Springer Science + Business Media, Inc., : c2004.,
Description:	211 p. :ill., digital ; : 25 cm.;
Contained By:	Springer e-books
Subject:	Systems on a chip - Design and construction. -
Online resource:	http://dx.doi.org/10.1007/b105966
ISBN:	9780306487330 (electronic bk.)

System level design model with reuse of system IP
System level design model with reuse of system IP[electronic resource] /edited by Patrizia Cavalloro ... [et al.]. - Boston :Springer Science + Business Media, Inc.,c2004. - 211 p. :ill., digital ;25 cm.

ISBN: 9780306487330 (electronic bk.)Subjects--Topical Terms:

636566
Systems on a chip
--Design and construction.

LC Class. No.: TK7895.E42 / S97 2004

Dewey Class. No.: 004.6

System level design model with reuse of system IP
LDR:00735nam 2200229 a 4500 001 743231
003 GreenPo
005 20081118152805.0
006 m d
007 cr nn 008maaau
008 130722s2004 mau j eng d
020 $a 9780306487330 (electronic bk.)
020 $a 9781402075940 (paper)
035 $a 978-1-4020-7594-0
050 0 0 $a TK7895.E42 $b S97 2004
082 0 0 $a 004.6 $2 22
090 $a TK7895.E42 $b S995 2004
245 0 0 $a System level design model with reuse of system IP $h [electronic resource] / $c edited by Patrizia Cavalloro ... [et al.].
260 $a Boston : $b Springer Science + Business Media, Inc., $c c2004.
300 $a 211 p. : $b ill., digital ; $c 25 cm.
650 0 $a Systems on a chip $x Design and construction. $3 636566
650 0 $a Modularity (Engineering) $3 643348
650 0 $a System design. $3 560330
700 1 $a Cavalloro, Patrizia. $3 895160
710 2 $a SpringerLink (Online service) $3 593884
773 0 $t Springer e-books
856 4 0 $u http://dx.doi.org/10.1007/b105966
950 $a Engineering

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