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Wafer level 3-d ics process technology
~
Tan, Chuan Seng.
Wafer level 3-d ics process technology
Record Type:
Language materials, printed : Monograph/item
Title/Author:
Wafer level 3-d ics process technology/ edited by Chuan Seng Tan, Ronald J. Gutmann, L. Rafael Reif.
other author:
Tan, Chuan Seng.
Published:
Boston, MA :Springer-Verlag US, : 2008.,
Description:
xiv, 358 p. :ill., digital ; : 24 cm.;
Series:
Series on integrated circuits and systems,
Contained By:
Springer eBooks
Subject:
Integrated circuits - Wafer-scale integration. -
Online resource:
http://dx.doi.org/10.1007/978-0-387-76534-1
ISBN:
9780387765341 (electronic bk.)
Wafer level 3-d ics process technology
Wafer level 3-d ics process technology
[electronic resource] /edited by Chuan Seng Tan, Ronald J. Gutmann, L. Rafael Reif. - Boston, MA :Springer-Verlag US,2008. - xiv, 358 p. :ill., digital ;24 cm. - Series on integrated circuits and systems,1558-9412.
ISBN: 9780387765341 (electronic bk.)Subjects--Topical Terms:
782939
Integrated circuits
--Wafer-scale integration.
LC Class. No.: TK7874 / .W34 2008
Dewey Class. No.: 621.3815
Wafer level 3-d ics process technology
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edited by Chuan Seng Tan, Ronald J. Gutmann, L. Rafael Reif.
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Boston, MA :
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Springer-Verlag US,
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2008.
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xiv, 358 p. :
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ill., digital ;
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24 cm.
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Wafer-scale integration.
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Surfaces and Interfaces, Thin Films.
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Tan, Chuan Seng.
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Reif, L. Rafael.
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Engineering (Springer-11647)
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