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Source-synchronous networks-on-chip ...

Mahapatra, Rabi.

Source-synchronous networks-on-chip = circuit and architectural interconnect modeling /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Source-synchronous networks-on-chip/ by Ayan Mandal, Sunil P. Khatri, Rabi Mahapatra.
其他題名:	circuit and architectural interconnect modeling /
作者:	Mandal, Ayan.
其他作者:	Khatri, Sunil P.
出版者:	New York, NY :Springer New York : : 2014.,
面頁冊數:	xiii, 143 p. :ill. (some col.), digital ; : 24 cm.;
Contained By:	Springer eBooks
標題:	Networks on a chip - Design. -
電子資源:	http://dx.doi.org/10.1007/978-1-4614-9405-8
ISBN:	9781461494058 (electronic bk.)

Source-synchronous networks-on-chip = circuit and architectural interconnect modeling /
Mandal, Ayan.

Source-synchronous networks-on-chipcircuit and architectural interconnect modeling /[electronic resource] :by Ayan Mandal, Sunil P. Khatri, Rabi Mahapatra. - New York, NY :Springer New York :2014. - xiii, 143 p. :ill. (some col.), digital ;24 cm.

ISBN: 9781461494058 (electronic bk.)Subjects--Topical Terms:

1019701
Networks on a chip
--Design.

Dewey Class. No.: 621.381531

Source-synchronous networks-on-chip = circuit and architectural interconnect modeling /
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