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Verification techniques for system-l...
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Fujita, Masahiro, (1956-)
Verification techniques for system-level design
紀錄類型:
書目-語言資料,印刷品 : Monograph/item
正題名/作者:
Verification techniques for system-level design/ Masahiro Fujita, Indradeep Ghosh, and Mukul Prasad.
作者:
Fujita, Masahiro,
其他作者:
Ghosh, Indradeep,
出版者:
Amsterdam ;Morgan Kaufmann Publishers, : c2008.,
面頁冊數:
viii, 240 p. :ill. ; : 25 cm.;
標題:
Systems on a chip - Testing. -
電子資源:
click for full text (2015 TAEBDC PDA eBooks Trial, Trial Period: 2015.6.3-2015.12.31)
ISBN:
9780123706164 (electronic bk.)
Verification techniques for system-level design
Fujita, Masahiro,1956-
Verification techniques for system-level design
[electronic resource] /Masahiro Fujita, Indradeep Ghosh, and Mukul Prasad. - Amsterdam ;Morgan Kaufmann Publishers,c2008. - viii, 240 p. :ill. ;25 cm. - The Morgan Kaufmann series in systems on silicon.
Includes bibliographical references and index.
ISBN: 9780123706164 (electronic bk.)
LCCN: 2007028038Subjects--Topical Terms:
655639
Systems on a chip
--Testing.
LC Class. No.: TK7895.E42 / F95 2008
Dewey Class. No.: 621.3815
Verification techniques for system-level design
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click for full text (2015 TAEBDC PDA eBooks Trial, Trial Period: 2015.6.3-2015.12.31)
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