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Architectures for computer vision DU...
~
Jeong, Hong.
Architectures for computer vision DUP_1 = from algorithm to chip with Verilog /
紀錄類型:
書目-語言資料,印刷品 : Monograph/item
正題名/作者:
Architectures for computer vision DUP_1/ Hong Jeong.
其他題名:
from algorithm to chip with Verilog /
其他題名:
From algorithm to chip with Verilog
作者:
Jeong, Hong.
出版者:
Singapore :John Wiley & Sons Singapore, : 2014.,
面頁冊數:
1 online resource (xv, 450 p.)
標題:
Verilog (Computer hardware description language) -
電子資源:
http://onlinelibrary.wiley.com/book/10.1002/9781118659199
ISBN:
9781118659212 (electronic bk.)
Architectures for computer vision DUP_1 = from algorithm to chip with Verilog /
Jeong, Hong.
Architectures for computer vision DUP_1
from algorithm to chip with Verilog /[electronic resource] :From algorithm to chip with VerilogHong Jeong. - Singapore :John Wiley & Sons Singapore,2014. - 1 online resource (xv, 450 p.)
Includes bibliographical references and index.
ISBN: 9781118659212 (electronic bk.)
LCCN: 2014021698Subjects--Topical Terms:
563915
Verilog (Computer hardware description language)
LC Class. No.: TK7885.7 / .J46 2014
Dewey Class. No.: 621.39
Architectures for computer vision DUP_1 = from algorithm to chip with Verilog /
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http://onlinelibrary.wiley.com/book/10.1002/9781118659199
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