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Electrical overstress (EOS) DUP_1 = devices, circuits, and systems /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Electrical overstress (EOS) DUP_1/ Steven H. Voldman.
其他題名:	devices, circuits, and systems /
作者:	Voldman, Steven H.
出版者:	Chichester, West Sussex, UK :Wiley, : 2014.,
面頁冊數:	1 online resource (xxiv, 344 p.)
標題:	Semiconductors - Failures. -
電子資源:	http://onlinelibrary.wiley.com/book/10.1002/9781118703328
ISBN:	9781118703342 (electronic bk.)

Electrical overstress (EOS) DUP_1 = devices, circuits, and systems /
Voldman, Steven H.

Electrical overstress (EOS) DUP_1devices, circuits, and systems /[electronic resource] :Steven H. Voldman. - Chichester, West Sussex, UK :Wiley,2014. - 1 online resource (xxiv, 344 p.) - ESD series. - ESD series..

Includes bibliographical references and index.

"Electrical Overstress (EOS) continues to impact semiconductor manufacturing, semiconductor components and systems as technologies scale from micro- to nano-electronics. This book teaches the fundamentals of electrical overstress and how to minimize and mitigate EOS failures. The text provides a clear picture of EOS phenomena, EOS origins, EOS sources, EOS physics, EOS failure mechanisms, and EOS on-chip and system design. It provides an illuminating insight into the sources of EOS in manufacturing, integration of on-chip, and system level EOS protection networks, followed by examples in specific technologies, circuits, and chips. The book is unique in covering the EOS manufacturing issues from on-chip design and electronic design automation to factory-level EOS program management in today's modern world. Look inside for extensive coverage on: Fundamentals of electrical overstress, from EOS physics, EOS time scales, safe operating area (SOA), to physical models for EOS phenomena EOS sources in today's semiconductor manufacturing environment, and EOS program management, handling and EOS auditing processing to avoid EOS failures EOS failures in both semiconductor devices, circuits and system. Discussion of how to distinguish between EOS events, and electrostatic discharge (ESD) events (e.g. such as human body model (HBM), charged device model (CDM), cable discharge events (CDM), charged board events (CBE), to system level IEC 61000-4-2 test events) EOS protection on-chip design practices and how they differ from ESD protection networks and solutions. Discussion of EOS system level concerns in printed circuit boards (PCB), and manufacturing equipment. Examples of EOS issues in state-of-the-art digital, analog and power technologies including CMOS, LDMOS, and BCD EOS design rule checking (DRC), LVS, and ERC electronic design automation (EDA) and how it is distinct from ESD EDA systems EOS testing and qualification techniques, and Practical off-chip ESD protection and system level solutions to provide more robust systems Electrical Overstress (EOS): Devices, Circuits and Systems is a continuation of the author's series of books on ESD protection. It is an essential reference and a useful insight into the issues that confront modern technology as we enter the nano-electronic era"--

ISBN: 9781118703342 (electronic bk.)

LCCN: 2013026202Subjects--Topical Terms:

670934
Semiconductors
--Failures.

LC Class. No.: TK7871.852

Dewey Class. No.: 621.3815

Electrical overstress (EOS) DUP_1 = devices, circuits, and systems /
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100 1 $a Voldman, Steven H. $3 1058585
245 1 0 $a Electrical overstress (EOS) DUP_1 $h [electronic resource] : $b devices, circuits, and systems / $c Steven H. Voldman.
260 $a Chichester, West Sussex, UK : $b Wiley, $c 2014.
300 $a 1 online resource (xxiv, 344 p.)
490 1 $a ESD series
504 $a Includes bibliographical references and index.
520 $a "Electrical Overstress (EOS) continues to impact semiconductor manufacturing, semiconductor components and systems as technologies scale from micro- to nano-electronics. This book teaches the fundamentals of electrical overstress and how to minimize and mitigate EOS failures. The text provides a clear picture of EOS phenomena, EOS origins, EOS sources, EOS physics, EOS failure mechanisms, and EOS on-chip and system design. It provides an illuminating insight into the sources of EOS in manufacturing, integration of on-chip, and system level EOS protection networks, followed by examples in specific technologies, circuits, and chips. The book is unique in covering the EOS manufacturing issues from on-chip design and electronic design automation to factory-level EOS program management in today's modern world. Look inside for extensive coverage on: Fundamentals of electrical overstress, from EOS physics, EOS time scales, safe operating area (SOA), to physical models for EOS phenomena EOS sources in today's semiconductor manufacturing environment, and EOS program management, handling and EOS auditing processing to avoid EOS failures EOS failures in both semiconductor devices, circuits and system. Discussion of how to distinguish between EOS events, and electrostatic discharge (ESD) events (e.g. such as human body model (HBM), charged device model (CDM), cable discharge events (CDM), charged board events (CBE), to system level IEC 61000-4-2 test events) EOS protection on-chip design practices and how they differ from ESD protection networks and solutions. Discussion of EOS system level concerns in printed circuit boards (PCB), and manufacturing equipment. Examples of EOS issues in state-of-the-art digital, analog and power technologies including CMOS, LDMOS, and BCD EOS design rule checking (DRC), LVS, and ERC electronic design automation (EDA) and how it is distinct from ESD EDA systems EOS testing and qualification techniques, and Practical off-chip ESD protection and system level solutions to provide more robust systems Electrical Overstress (EOS): Devices, Circuits and Systems is a continuation of the author's series of books on ESD protection. It is an essential reference and a useful insight into the issues that confront modern technology as we enter the nano-electronic era"-- $c Provided by publisher.
520 $a "This book addresses EOS phenomena and distinguish it from other forms of phenomena such as electrostatic discharge (ESD), latchup, and EMC events"-- $c Provided by publisher.
588 $a Description based on online resource; title from PDF title page (Wiley, viewed September 23, 2013)
650 0 $a Semiconductors $x Failures. $3 670934
650 0 $a Semiconductors $x Protection. $3 1058979
650 0 $a Transients (Electricity) $b Mathematical models. $3 795525
650 0 $a Overvoltage. $3 1059421
830 0 $a ESD series. $3 1059420
856 4 0 $u http://onlinelibrary.wiley.com/book/10.1002/9781118703328