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Design, analysis and test of logic c...

Hayes, John P.

Design, analysis and test of logic circuits under uncertainty

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Design, analysis and test of logic circuits under uncertainty/ by Smita Krishnaswamy, Igor L. Markov, John P. Hayes.
作者:	Krishnaswamy, Smita.
其他作者:	Markov, Igor L.
出版者:	Dordrecht :Springer Netherlands : : 2013.,
面頁冊數:	xi, 123 p. :ill., digital ; : 24 cm.;
Contained By:	Springer eBooks
標題:	Logic circuits - Design. -
電子資源:	http://dx.doi.org/10.1007/978-90-481-9644-9
ISBN:	9789048196449 (electronic bk.)

Design, analysis and test of logic circuits under uncertainty
Krishnaswamy, Smita.

Design, analysis and test of logic circuits under uncertainty[electronic resource] /by Smita Krishnaswamy, Igor L. Markov, John P. Hayes. - Dordrecht :Springer Netherlands :2013. - xi, 123 p. :ill., digital ;24 cm. - Lecture notes in electrical engineering,v.1151876-1100 ;. - Lecture notes in electrical engineering ;v. 34 .

ISBN: 9789048196449 (electronic bk.)Subjects--Topical Terms:

1071901
Logic circuits
--Design.

LC Class. No.: TK7868.L6 / K75 2013

Dewey Class. No.: 621.395

Design, analysis and test of logic circuits under uncertainty
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650 2 4 $a Circuits and Systems. $3 670901
650 2 4 $a Arithmetic and Logic Structures. $3 672631
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