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Design recipes for FPGAs : = using V...

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Wilson, Peter R.

Design recipes for FPGAs : = using Verilog and VHDL /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Design recipes for FPGAs :/ Peter Wilson.
其他題名:	using Verilog and VHDL /
作者:	Wilson, Peter R.
出版者:	Amsterdam :Newnes, an imprint of Elsevier, : c2016.,
面頁冊數:	xix, 369 p. :ill. ; : 24 cm.;
標題:	Field programmable gate arrays - Design and construction. -
ISBN:	9780080971292 (pbk.) :

Design recipes for FPGAs : = using Verilog and VHDL /
Wilson, Peter R.

Design recipes for FPGAs :using Verilog and VHDL /Peter Wilson. - 2nd ed. - Amsterdam :Newnes, an imprint of Elsevier,c2016. - xix, 369 p. :ill. ;24 cm.

Includes bibliographical references (p. 361-363) and index.

ISBN: 9780080971292 (pbk.) :NT1964Subjects--Topical Terms:

596376
Field programmable gate arrays
--Design and construction.

LC Class. No.: TK7895.G36 / W55 2016

Dewey Class. No.: 621.395

Design recipes for FPGAs : = using Verilog and VHDL /
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650 # 0 $a VHDL (Computer hardware description language) $3 591587

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