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Design recipes for FPGAs : = using V...

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Wilson, Peter R.

Design recipes for FPGAs : = using Verilog and VHDL /

Record Type:	Language materials, printed : Monograph/item
Title/Author:	Design recipes for FPGAs :/ Peter Wilson.
Reminder of title:	using Verilog and VHDL /
Author:	Wilson, Peter R.
Published:	Amsterdam :Newnes, an imprint of Elsevier, : c2016.,
Description:	xix, 369 p. :ill. ; : 24 cm.;
Subject:	Field programmable gate arrays - Design and construction. -
ISBN:	9780080971292 (pbk.) :

Design recipes for FPGAs : = using Verilog and VHDL /
Wilson, Peter R.

Design recipes for FPGAs :using Verilog and VHDL /Peter Wilson. - 2nd ed. - Amsterdam :Newnes, an imprint of Elsevier,c2016. - xix, 369 p. :ill. ;24 cm.

Includes bibliographical references (p. 361-363) and index.

ISBN: 9780080971292 (pbk.) :NT1964Subjects--Topical Terms:

596376
Field programmable gate arrays
--Design and construction.

LC Class. No.: TK7895.G36 / W55 2016

Dewey Class. No.: 621.395

Design recipes for FPGAs : = using Verilog and VHDL /
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100 1 $a Wilson, Peter R. $q (Peter Reid) $3 1027033
245 1 0 $a Design recipes for FPGAs : $b using Verilog and VHDL / $c Peter Wilson.
250 $a 2nd ed.
260 # $a Amsterdam : $b Newnes, an imprint of Elsevier, $c c2016.
300 $a xix, 369 p. : $b ill. ; $c 24 cm.
504 $a Includes bibliographical references (p. 361-363) and index.
650 # 0 $a Field programmable gate arrays $x Design and construction. $3 596376
650 # 0 $a Verilog (Computer hardware description language) $3 563915
650 # 0 $a VHDL (Computer hardware description language) $3 591587

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