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Invasive tightly coupled processor arrays

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Invasive tightly coupled processor arrays/ by Vahid Lari.
作者:	Lari, Vahid.
出版者:	Singapore :Springer Singapore : : 2016.,
面頁冊數:	xxiii, 149 p. :ill. (some col.), digital ; : 24 cm.;
Contained By:	Springer eBooks
標題:	Array processors. -
電子資源:	http://dx.doi.org/10.1007/978-981-10-1058-3
ISBN:	9789811010583

Invasive tightly coupled processor arrays
Lari, Vahid.

Invasive tightly coupled processor arrays[electronic resource] /by Vahid Lari. - Singapore :Springer Singapore :2016. - xxiii, 149 p. :ill. (some col.), digital ;24 cm. - Computer architecture and design methodologies,2367-3478. - Computer architecture and design methodologies..

Introduction -- Invasive Tightly Coupled Processor Arrays -- Self-adaptive Power and Energy Management for TCPAs -- On-Demand Fault Tolerance on Massively Parallel Processor Arrays -- Conclusions and Future Work.

This book introduces new massively parallel computer (MPSoC) architectures called invasive tightly coupled processor arrays. It proposes strategies, architecture designs, and programming interfaces for invasive TCPAs that allow invading and subsequently executing loop programs with strict requirements or guarantees of non-functional execution qualities such as performance, power consumption, and reliability. For the first time, such a configurable processor array architecture consisting of locally interconnected VLIW processing elements can be claimed by programs, either in full or in part, using the principle of invasive computing. Invasive TCPAs provide unprecedented energy efficiency for the parallel execution of nested loop programs by avoiding any global memory access such as GPUs and may even support loops with complex dependencies such as loop-carried dependencies that are not amenable to parallel execution on GPUs. For this purpose, the book proposes different invasion strategies for claiming a desired number of processing elements (PEs) or region within a TCPA exclusively for an application according to performance requirements. It not only presents models for implementing invasion strategies in hardware, but also proposes two distinct design flavors for dedicated hardware components to support invasion control on TCPAs.

ISBN: 9789811010583

Standard No.: 10.1007/978-981-10-1058-3doiSubjects--Topical Terms:

772724
Array processors.

LC Class. No.: QA76.5

Dewey Class. No.: 004.35

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