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Spacer engineered FinFET architectur...

Dasgupta, Sudeb.

Spacer engineered FinFET architectures : = high-performance digital circuit applications /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Spacer engineered FinFET architectures :/ Brajesh Kumar Kaushik, Sudeb Dasgupta, Pankaj Kumar Pal.
其他題名:	high-performance digital circuit applications /
作者:	Kaushik, Brajesh Kumar.
其他作者:	Dasgupta, Sudeb.
出版者:	Boca Raton :Taylor & Francis, CRC Press, : c2017.,
面頁冊數:	xvi, 138 p. :ill. (some col.), ports. ; : 24 cm.;
標題:	Metal oxide semiconductor field-effect transistors. -
ISBN:	9781498783590 :

Spacer engineered FinFET architectures : = high-performance digital circuit applications /
Kaushik, Brajesh Kumar.

Spacer engineered FinFET architectures :high-performance digital circuit applications /Brajesh Kumar Kaushik, Sudeb Dasgupta, Pankaj Kumar Pal. - Boca Raton :Taylor & Francis, CRC Press,c2017. - xvi, 138 p. :ill. (some col.), ports. ;24 cm.

Includes bibliographical references and index.

Introduction to nanoelectronics -- Tri-gate FinFET technology and its advancement -- Dual-K spacer device architectures and its electrostatics -- Capacitive analysis & dual-K FinFET based digital circuit design -- Design metric improvement of dual-K based SRAM cell -- Statistical variability & sensitivity analysis.

ISBN: 9781498783590 :NT4450

LCCN: 2016051118Subjects--Topical Terms:

598326
Metal oxide semiconductor field-effect transistors.

LC Class. No.: TK7871.95 / .DK21 2017

Dewey Class. No.: 621.3815/284

Spacer engineered FinFET architectures : = high-performance digital circuit applications /
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505 0 # $a Introduction to nanoelectronics -- Tri-gate FinFET technology and its advancement -- Dual-K spacer device architectures and its electrostatics -- Capacitive analysis & dual-K FinFET based digital circuit design -- Design metric improvement of dual-K based SRAM cell -- Statistical variability & sensitivity analysis.
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