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System reduction for nanoscale IC design

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	System reduction for nanoscale IC design/ edited by Peter Benner.
其他作者:	Benner, Peter.
出版者:	Cham :Springer International Publishing : : 2017.,
面頁冊數:	xi, 197 p. :ill., digital ; : 24 cm.;
Contained By:	Springer eBooks
標題:	Integrated circuits - Design and construction. -
電子資源:	http://dx.doi.org/10.1007/978-3-319-07236-4
ISBN:	9783319072364

System reduction for nanoscale IC design
System reduction for nanoscale IC design[electronic resource] /edited by Peter Benner. - Cham :Springer International Publishing :2017. - xi, 197 p. :ill., digital ;24 cm. - Mathematics in industry,201612-3956 ;. - Mathematics in industry ;18. .

Preface -- 1 Model order reduction of integrated circuits in electrical networks: Michael Hinze, Martin Kunkel, Ulrich Matthes, and Morten Vierling -- 2 Element-based model reduction in circuit simulation: Andreas Steinbrecher and Tatjana Stykel -- 3 Reduced Representation of Power Grid Models: Peter Benner and Andre Schneider -- 4 Coupling of numeric/symbolic reduction methods for generating parametrized models of nanoelectronic systems: Oliver Schmidt, Matthias Hauser, and Patrick Lang -- 5 Low-Rank Cholesky Factor Krylov Subspace Methods for Generalized Projected Lyapunov Equations: Matthias Bollhofer and Andre K. Eppler -- Index.

This book describes the computational challenges posed by the progression toward nanoscale electronic devices and increasingly short design cycles in the microelectronics industry, and proposes methods of model reduction which facilitate circuit and device simulation for specific tasks in the design cycle. The goal is to develop and compare methods for system reduction in the design of high dimensional nanoelectronic ICs, and to test these methods in the practice of semiconductor development. Six chapters describe the challenges for numerical simulation of nanoelectronic circuits and suggest model reduction methods for constituting equations. These include linear and nonlinear differential equations tailored to circuit equations and drift diffusion equations for semiconductor devices. The performance of these methods is illustrated with numerical experiments using real-world data. Readers will benefit from an up-to-date overview of the latest model reduction methods in computational nanoelectronics.

ISBN: 9783319072364

Standard No.: 10.1007/978-3-319-07236-4doiSubjects--Topical Terms:

561265
Integrated circuits
--Design and construction.

LC Class. No.: TK7874

Dewey Class. No.: 621.3815

System reduction for nanoscale IC design
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505 0 $a Preface -- 1 Model order reduction of integrated circuits in electrical networks: Michael Hinze, Martin Kunkel, Ulrich Matthes, and Morten Vierling -- 2 Element-based model reduction in circuit simulation: Andreas Steinbrecher and Tatjana Stykel -- 3 Reduced Representation of Power Grid Models: Peter Benner and Andre Schneider -- 4 Coupling of numeric/symbolic reduction methods for generating parametrized models of nanoelectronic systems: Oliver Schmidt, Matthias Hauser, and Patrick Lang -- 5 Low-Rank Cholesky Factor Krylov Subspace Methods for Generalized Projected Lyapunov Equations: Matthias Bollhofer and Andre K. Eppler -- Index.
520 $a This book describes the computational challenges posed by the progression toward nanoscale electronic devices and increasingly short design cycles in the microelectronics industry, and proposes methods of model reduction which facilitate circuit and device simulation for specific tasks in the design cycle. The goal is to develop and compare methods for system reduction in the design of high dimensional nanoelectronic ICs, and to test these methods in the practice of semiconductor development. Six chapters describe the challenges for numerical simulation of nanoelectronic circuits and suggest model reduction methods for constituting equations. These include linear and nonlinear differential equations tailored to circuit equations and drift diffusion equations for semiconductor devices. The performance of these methods is illustrated with numerical experiments using real-world data. Readers will benefit from an up-to-date overview of the latest model reduction methods in computational nanoelectronics.
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