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Architectural Support for Large-scal...
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Princeton University.
Architectural Support for Large-scale Shared Memory Systems.
紀錄類型:
書目-語言資料,手稿 : Monograph/item
正題名/作者:
Architectural Support for Large-scale Shared Memory Systems./
作者:
Fu, Yaosheng.
面頁冊數:
1 online resource (179 pages)
附註:
Source: Dissertation Abstracts International, Volume: 79-05(E), Section: B.
Contained By:
Dissertation Abstracts International79-05B(E).
標題:
Computer engineering. -
電子資源:
click for full text (PQDT)
ISBN:
9780355480177
Architectural Support for Large-scale Shared Memory Systems.
Fu, Yaosheng.
Architectural Support for Large-scale Shared Memory Systems.
- 1 online resource (179 pages)
Source: Dissertation Abstracts International, Volume: 79-05(E), Section: B.
Thesis (Ph.D.)
Includes bibliographical references
Modern CPUs, GPUs, and data centers are being built with more and more cores. Many popular workloads will require even more hardware parallelism in the future. Shared memory is a popular parallel programming model with many advantages, but it is historically difficult to scale to a large number of cores/nodes.
Electronic reproduction.
Ann Arbor, Mich. :
ProQuest,
2018
Mode of access: World Wide Web
ISBN: 9780355480177Subjects--Topical Terms:
569006
Computer engineering.
Index Terms--Genre/Form:
554714
Electronic books.
Architectural Support for Large-scale Shared Memory Systems.
LDR
:03768ntm a2200397Ki 4500
001
910575
005
20180517123957.5
006
m o u
007
cr mn||||a|a||
008
190606s2017 xx obm 000 0 eng d
020
$a
9780355480177
035
$a
(MiAaPQ)AAI10633793
035
$a
(MiAaPQ)princeton:12333
035
$a
AAI10633793
040
$a
MiAaPQ
$b
eng
$c
MiAaPQ
099
$a
TUL
$f
hyy
$c
available through World Wide Web
100
1
$a
Fu, Yaosheng.
$3
1181934
245
1 0
$a
Architectural Support for Large-scale Shared Memory Systems.
264
0
$c
2017
300
$a
1 online resource (179 pages)
336
$a
text
$b
txt
$2
rdacontent
337
$a
computer
$b
c
$2
rdamedia
338
$a
online resource
$b
cr
$2
rdacarrier
500
$a
Source: Dissertation Abstracts International, Volume: 79-05(E), Section: B.
500
$a
Adviser: David Wentzlaff.
502
$a
Thesis (Ph.D.)
$c
Princeton University
$d
2017.
504
$a
Includes bibliographical references
520
$a
Modern CPUs, GPUs, and data centers are being built with more and more cores. Many popular workloads will require even more hardware parallelism in the future. Shared memory is a popular parallel programming model with many advantages, but it is historically difficult to scale to a large number of cores/nodes.
520
$a
This thesis investigates hardware and software techniques that enable shared memory systems to scale. To be specific, this work focuses on improving two key challenges of large-scale shared memory systems: scalability and fault-tolerance. The primary scalability challenge of shared memory systems is the need to maintain cache coherence across all cores/nodes, which is difficult at scale. The fault-tolerance challenge arises mainly for distributed shared memory (DSM) systems because they are usually tightly integrated and thus do not provide good fault isolation between nodes.
520
$a
In order to solve those challenges, this thesis first develops a parallel simulator named PriME to simulate shared memory systems at scale. PriME is a parallel and distributed simulator that supports multi-threaded workloads as well as multi-programmed workloads. To address scalability challenges, this thesis introduces Coherence Domain Restriction (CDR) as a cache coherence framework that sidesteps traditional scalability challenges and enables systems to scale to thousands of cores within a manycore chip or millions of cores across the entire data center. The entire CDR framework has been implemented on the 25-core Princeton Piton processor.
520
$a
For fault-tolerance, this thesis has developed both a software-centric solution with resilient memory operations (REMO) and a hardware-centric solution with a fault-tolerant cache coherence framework (FTCC). REMO is a set of load and store instructions that can return faults that programmers can select to handle. REMO provides fault isolation in DSM systems, thereby enabling them to scale without sacrificing resilience. On the other hand, FTCC is a fault-tolerant cache coherence framework that extends DSM systems with native fault-tolerant ability in hardware without hurting their performance advantages. In sum, this thesis demonstrates that shared memory systems have the potential to achieve comparable scalability and fault-tolerance ability as current cluster-based designs while still maintaining other benefits such as ease of programming and efficient memory accesses.
533
$a
Electronic reproduction.
$b
Ann Arbor, Mich. :
$c
ProQuest,
$d
2018
538
$a
Mode of access: World Wide Web
650
4
$a
Computer engineering.
$3
569006
650
4
$a
Electrical engineering.
$3
596380
650
4
$a
Computer science.
$3
573171
655
7
$a
Electronic books.
$2
local
$3
554714
690
$a
0464
690
$a
0544
690
$a
0984
710
2
$a
ProQuest Information and Learning Co.
$3
1178819
710
2
$a
Princeton University.
$b
Electrical Engineering.
$3
1181685
773
0
$t
Dissertation Abstracts International
$g
79-05B(E).
856
4 0
$u
http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=10633793
$z
click for full text (PQDT)
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