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Gigabit Ethernet (FPGA Implementations).
~
ProQuest Information and Learning Co.
Gigabit Ethernet (FPGA Implementations).
Record Type:
Language materials, manuscript : Monograph/item
Title/Author:
Gigabit Ethernet (FPGA Implementations)./
Author:
Ghodke, Srinivas B.
Description:
1 online resource (69 pages)
Notes:
Source: Masters Abstracts International, Volume: 50-02, page: 1194.
Contained By:
Masters Abstracts International50-02.
Subject:
Electrical engineering. -
Online resource:
click for full text (PQDT)
ISBN:
9781124985398
Gigabit Ethernet (FPGA Implementations).
Ghodke, Srinivas B.
Gigabit Ethernet (FPGA Implementations).
- 1 online resource (69 pages)
Source: Masters Abstracts International, Volume: 50-02, page: 1194.
Thesis (M.S.)
Includes bibliographical references
The Ethernet core is designed for implementation of CSMA/CD LAN in accordance with the IEEE 802.3 standards. The Gigabit Ethernet technology is the high speed networking standard. Actually there are very few devices in the market and they do not provide coding and encoding. Hence this project deals with 8b/10b ENDEC for Gigabit Ethernet. It's a FPGA implementation and VLSI design & verification. In order to meet fast time to market requirements today's complex digital system design are using FPGAs. This paper will show you the design of 8b/10b Encoder/Decoder for Gigabit Ethernet using Actel SX FPGA.
Electronic reproduction.
Ann Arbor, Mich. :
ProQuest,
2018
Mode of access: World Wide Web
ISBN: 9781124985398Subjects--Topical Terms:
596380
Electrical engineering.
Index Terms--Genre/Form:
554714
Electronic books.
Gigabit Ethernet (FPGA Implementations).
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Ghodke, Srinivas B.
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Gigabit Ethernet (FPGA Implementations).
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Source: Masters Abstracts International, Volume: 50-02, page: 1194.
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Adviser: Reza Nekovei.
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Thesis (M.S.)
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Texas A&M University - Kingsville
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2011.
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Includes bibliographical references
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The Ethernet core is designed for implementation of CSMA/CD LAN in accordance with the IEEE 802.3 standards. The Gigabit Ethernet technology is the high speed networking standard. Actually there are very few devices in the market and they do not provide coding and encoding. Hence this project deals with 8b/10b ENDEC for Gigabit Ethernet. It's a FPGA implementation and VLSI design & verification. In order to meet fast time to market requirements today's complex digital system design are using FPGAs. This paper will show you the design of 8b/10b Encoder/Decoder for Gigabit Ethernet using Actel SX FPGA.
520
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VHDL is a high performance language for implementation and simulation. It integrates computation visualization and programming in an easy to use environment. VHDL is therefore built on a foundation of sophisticated language in which the basic element can implement it and verify it for hardware implementation.
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Active HDL software is used for simulation and optimization of synthesizable VHDL code. This software is also used to verify the code generated in other applications.
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Ann Arbor, Mich. :
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ProQuest,
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2018
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Mode of access: World Wide Web
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ProQuest Information and Learning Co.
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click for full text (PQDT)
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