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A 200MS/s 12-bit subranging SAR ADC.

Record Type:	Language materials, manuscript : Monograph/item
Title/Author:	A 200MS/s 12-bit subranging SAR ADC./
Author:	Elies, Brian.
Description:	1 online resource (45 pages)
Notes:	Source: Masters Abstracts International, Volume: 55-03.
Contained By:	Masters Abstracts International55-03(E).
Subject:	Electrical engineering. -
Online resource:	click for full text (PQDT)
ISBN:	9781339468143

A 200MS/s 12-bit subranging SAR ADC.
Elies, Brian.

A 200MS/s 12-bit subranging SAR ADC. - 1 online resource (45 pages)

Source: Masters Abstracts International, Volume: 55-03.

Thesis (M.S.E.E.)

Includes bibliographical references

This item is not available from ProQuest Dissertations & Theses.

The scaling of semiconductor technology results in great improvements in the speed, area and power consumption of transistors. These improvements allow system designers to increase the digital complexity while simultaneously reducing the power consumption, area and cost. This superb digital performance results in an increased demand for analog-to-digital converter (ADC) architectures that can provide high-speed, high-resolution digitization with low power consumption. Unfortunately, many traditional ADC architectures do not receive the same increase in performance as their digital counterparts in deeply scaled CMOS processes. This magnifies the analog design time, effort, complexity and cost of the ADC. Presented here is a subranging architecture that utilizes a coarse pipeline and fine successive approximation register (SAR) ADCs, combined with time interleaving, achieving 12-bit, 200-MS/s. The architecture makes use of analog redundancy to tolerate gain error, nonlinearity and comparator offset caused by the coarse ADC. Dynamic settling errors in the SAR ADC are corrected by sub-radix redundancy. To further improve the performance of the design a calibration mode is proposed to correct capacitor mismatch, channel gain mismatch and channel offset.

Electronic reproduction.
Ann Arbor, Mich. :
ProQuest,
2018

Mode of access: World Wide Web

ISBN: 9781339468143Subjects--Topical Terms:

596380
Electrical engineering.
Index Terms--Genre/Form:

554714
Electronic books.

A 200MS/s 12-bit subranging SAR ADC.
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100 1 $a Elies, Brian. $3 1184100
245 1 2 $a A 200MS/s 12-bit subranging SAR ADC.
264 0 $c 2015
300 $a 1 online resource (45 pages)
336 $a text $b txt $2 rdacontent
337 $a computer $b c $2 rdamedia
338 $a online resource $b cr $2 rdacarrier
500 $a Source: Masters Abstracts International, Volume: 55-03.
500 $a Adviser: Yun Chiu.
502 $a Thesis (M.S.E.E.) $c The University of Texas at Dallas $d 2015.
504 $a Includes bibliographical references
506 $a This item is not available from ProQuest Dissertations & Theses.
520 $a The scaling of semiconductor technology results in great improvements in the speed, area and power consumption of transistors. These improvements allow system designers to increase the digital complexity while simultaneously reducing the power consumption, area and cost. This superb digital performance results in an increased demand for analog-to-digital converter (ADC) architectures that can provide high-speed, high-resolution digitization with low power consumption. Unfortunately, many traditional ADC architectures do not receive the same increase in performance as their digital counterparts in deeply scaled CMOS processes. This magnifies the analog design time, effort, complexity and cost of the ADC. Presented here is a subranging architecture that utilizes a coarse pipeline and fine successive approximation register (SAR) ADCs, combined with time interleaving, achieving 12-bit, 200-MS/s. The architecture makes use of analog redundancy to tolerate gain error, nonlinearity and comparator offset caused by the coarse ADC. Dynamic settling errors in the SAR ADC are corrected by sub-radix redundancy. To further improve the performance of the design a calibration mode is proposed to correct capacitor mismatch, channel gain mismatch and channel offset.
533 $a Electronic reproduction. $b Ann Arbor, Mich. : $c ProQuest, $d 2018
538 $a Mode of access: World Wide Web
650 4 $a Electrical engineering. $3 596380
655 7 $a Electronic books. $2 local $3 554714
690 $a 0544
710 2 $a ProQuest Information and Learning Co. $3 1178819
710 2 $a The University of Texas at Dallas. $b Electrical Engineering. $3 1181534
773 0 $t Masters Abstracts International $g 55-03(E).
856 4 0 $u http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=10010803 $z click for full text (PQDT)