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Design and analysis of a low-power 8...

ProQuest Information and Learning Co.

Design and analysis of a low-power 8-bit 500 KS/s SAR ADC for bio-medical implant devices.

紀錄類型:	書目-語言資料,手稿 : Monograph/item
正題名/作者:	Design and analysis of a low-power 8-bit 500 KS/s SAR ADC for bio-medical implant devices./
作者:	Mazidi, Ehsan.
面頁冊數:	1 online resource (106 pages)
附註:	Source: Masters Abstracts International, Volume: 56-03.
Contained By:	Masters Abstracts International56-03(E).
標題:	Electrical engineering. -
電子資源:	click for full text (PQDT)
ISBN:	9781369570052

Design and analysis of a low-power 8-bit 500 KS/s SAR ADC for bio-medical implant devices.
Mazidi, Ehsan.

Design and analysis of a low-power 8-bit 500 KS/s SAR ADC for bio-medical implant devices. - 1 online resource (106 pages)

Source: Masters Abstracts International, Volume: 56-03.

Thesis (M.S.)

Includes bibliographical references

This item is not available from ProQuest Dissertations & Theses.

This thesis project involves the design and analysis of an 8-bit Successive Approximation Register (SAR) Analog to Digital Convertor (ADC), designed for low- power applications such as bio-medical implants. The sampling rate for this ADC is 500 KS/s. The power consumption for the whole SAR ADC system was measured to be 2.1 muW. The novelty of this project is the proposal of an extremely energy efficient comparator architecture. The result is the design of a final ADC with reasonable sampling speed, accuracy and low power consumption. In this project, all the different subsystems have been designed at the transistor level with 45 nm CMOS technology. The logical circuit was designed using Verilog language. It was then synthesized and integrated in the overall system.

Electronic reproduction.
Ann Arbor, Mich. :
ProQuest,
2018

Mode of access: World Wide Web

ISBN: 9781369570052Subjects--Topical Terms:

596380
Electrical engineering.
Index Terms--Genre/Form:

554714
Electronic books.

Design and analysis of a low-power 8-bit 500 KS/s SAR ADC for bio-medical implant devices.
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100 1 $a Mazidi, Ehsan. $3 1184112
245 1 0 $a Design and analysis of a low-power 8-bit 500 KS/s SAR ADC for bio-medical implant devices.
264 0 $c 2016
300 $a 1 online resource (106 pages)
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338 $a online resource $b cr $2 rdacarrier
500 $a Source: Masters Abstracts International, Volume: 56-03.
500 $a Adviser: Shahab Ardalan.
502 $a Thesis (M.S.) $c San Jose State University $d 2016.
504 $a Includes bibliographical references
506 $a This item is not available from ProQuest Dissertations & Theses.
520 $a This thesis project involves the design and analysis of an 8-bit Successive Approximation Register (SAR) Analog to Digital Convertor (ADC), designed for low- power applications such as bio-medical implants. The sampling rate for this ADC is 500 KS/s. The power consumption for the whole SAR ADC system was measured to be 2.1 muW. The novelty of this project is the proposal of an extremely energy efficient comparator architecture. The result is the design of a final ADC with reasonable sampling speed, accuracy and low power consumption. In this project, all the different subsystems have been designed at the transistor level with 45 nm CMOS technology. The logical circuit was designed using Verilog language. It was then synthesized and integrated in the overall system.
533 $a Electronic reproduction. $b Ann Arbor, Mich. : $c ProQuest, $d 2018
538 $a Mode of access: World Wide Web
650 4 $a Electrical engineering. $3 596380
655 7 $a Electronic books. $2 local $3 554714
690 $a 0544
710 2 $a ProQuest Information and Learning Co. $3 1178819
710 2 $a San Jose State University. $b Engineering. $3 845701
773 0 $t Masters Abstracts International $g 56-03(E).
856 4 0 $u http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=10255169 $z click for full text (PQDT)

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