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High Speed Clock and Data Recovery T...
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University of Toronto (Canada).
High Speed Clock and Data Recovery Techniques.
Record Type:
Language materials, manuscript : Monograph/item
Title/Author:
High Speed Clock and Data Recovery Techniques./
Author:
Abiri, Behrooz.
Description:
1 online resource (92 pages)
Notes:
Source: Masters Abstracts International, Volume: 51-06.
Contained By:
Masters Abstracts International51-06(E).
Subject:
Electrical engineering. -
Online resource:
click for full text (PQDT)
ISBN:
9780494859148
High Speed Clock and Data Recovery Techniques.
Abiri, Behrooz.
High Speed Clock and Data Recovery Techniques.
- 1 online resource (92 pages)
Source: Masters Abstracts International, Volume: 51-06.
Thesis (M.A.Sc.)
Includes bibliographical references
This thesis presents two contributions in the area of high speed clock and data recovery systems. These contributions are focused on the fast phase recovery and adaptive equalization techniques.
Electronic reproduction.
Ann Arbor, Mich. :
ProQuest,
2018
Mode of access: World Wide Web
ISBN: 9780494859148Subjects--Topical Terms:
596380
Electrical engineering.
Index Terms--Genre/Form:
554714
Electronic books.
High Speed Clock and Data Recovery Techniques.
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available through World Wide Web
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Abiri, Behrooz.
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High Speed Clock and Data Recovery Techniques.
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2011
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1 online resource (92 pages)
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text
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txt
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online resource
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Source: Masters Abstracts International, Volume: 51-06.
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Adviser: Ali Sheikholeslami.
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Thesis (M.A.Sc.)
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University of Toronto (Canada)
$d
2011.
504
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Includes bibliographical references
520
$a
This thesis presents two contributions in the area of high speed clock and data recovery systems. These contributions are focused on the fast phase recovery and adaptive equalization techniques.
520
$a
The first contribution of this thesis is an adaptive engine for a 2x blind sampling receiver. The proposed adaptation engine is able to find the phase-dependent DFE coefficients of the receiver on the fly.
520
$a
The second contribution is a burst-mode clock and data recovery architecture which uses an analog phase interpolator. The proposed burst-mode CDR is capable of locking to the first data transition it receives. The phase interpolator uses the inherent timing information in the data transition to rotate the phase of a reference clock and align it with the incoming data edge. The feasibility of the concept is demonstrated through fabrication and measurements.
533
$a
Electronic reproduction.
$b
Ann Arbor, Mich. :
$c
ProQuest,
$d
2018
538
$a
Mode of access: World Wide Web
650
4
$a
Electrical engineering.
$3
596380
655
7
$a
Electronic books.
$2
local
$3
554714
690
$a
0544
710
2
$a
ProQuest Information and Learning Co.
$3
1178819
710
2
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University of Toronto (Canada).
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Electrical and Computer Engineering.
$3
1148628
773
0
$t
Masters Abstracts International
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51-06(E).
856
4 0
$u
http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=MR85914
$z
click for full text (PQDT)
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