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Design Considerations for Training Memristor Crossbars Used in Spiking Neural Networks.

Record Type:	Language materials, manuscript : Monograph/item
Title/Author:	Design Considerations for Training Memristor Crossbars Used in Spiking Neural Networks./
Author:	Hays, Lydia M.
Description:	1 online resource (73 pages)
Notes:	Source: Masters Abstracts International, Volume: 57-05.
Contained By:	Masters Abstracts International57-05(E).
Subject:	Computer engineering. -
Online resource:	click for full text (PQDT)
ISBN:	9780355887969

Design Considerations for Training Memristor Crossbars Used in Spiking Neural Networks.
Hays, Lydia M.

Design Considerations for Training Memristor Crossbars Used in Spiking Neural Networks. - 1 online resource (73 pages)

Source: Masters Abstracts International, Volume: 57-05.

Thesis (M.S.)--Rochester Institute of Technology, 2018.

Includes bibliographical references

CMOS/Memristor integrated architectures have shown to be powerful for realizing energy-efficient learning machines. These architectures are recently demonstrated in reservoir computing networks, which have reduced training complexity and resource utilization. In reservoir computing, the training time is curtailed due to random weight initialization in the hidden layer, which will remain constant during training. The CMOS/memristor variability can be exploited to generate these random weights and reduce the area overhead. Recent studies have shown that the CMOS/memristor crossbars are ideal for on-device learning machines, including reservoir computing networks. An exemplary CMOS/memristor crossbar based on-device accelerator, Ziksa, was demonstrated on several of these learning networks.

Electronic reproduction.
Ann Arbor, Mich. :
ProQuest,
2018

Mode of access: World Wide Web

ISBN: 9780355887969Subjects--Topical Terms:

569006
Computer engineering.
Index Terms--Genre/Form:

554714
Electronic books.

Design Considerations for Training Memristor Crossbars Used in Spiking Neural Networks.
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500 $a Source: Masters Abstracts International, Volume: 57-05.
500 $a Adviser: Dhireesha Kudithipudi.
502 $a Thesis (M.S.)--Rochester Institute of Technology, 2018.
504 $a Includes bibliographical references
520 $a CMOS/Memristor integrated architectures have shown to be powerful for realizing energy-efficient learning machines. These architectures are recently demonstrated in reservoir computing networks, which have reduced training complexity and resource utilization. In reservoir computing, the training time is curtailed due to random weight initialization in the hidden layer, which will remain constant during training. The CMOS/memristor variability can be exploited to generate these random weights and reduce the area overhead. Recent studies have shown that the CMOS/memristor crossbars are ideal for on-device learning machines, including reservoir computing networks. An exemplary CMOS/memristor crossbar based on-device accelerator, Ziksa, was demonstrated on several of these learning networks.
520 $a While the crossbars are generally area and energy efficient, the peripheral circuitry to control the read/write logic to the crossbars is extremely power hungry. This work focuses on improving the Ziksa accelerator peripheral circuitry for a spiking reservoir network. The optimized training circuitry for Ziksa includes transmission gates, a control unit, and a current amplifier and is demonstrated within a layer of spiking neurons for training and neuron behavior. All the analog circuits are validated using the Cadence 45 nm GPDK on a 2x4 and 1x4 crossbar. For a 32x32 crossbar, the area and power of the peripheral circuitry is ~2,800 microm2 and ~3.685 mW respectively, demonstrating the overall efficacy of the proposed circuits.
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538 $a Mode of access: World Wide Web
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710 2 $a Rochester Institute of Technology. $b Computer Engineering. $3 1184443
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