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High-speed decoders for polar codes
~
Gross, Warren J.
High-speed decoders for polar codes
紀錄類型:
書目-語言資料,印刷品 : Monograph/item
正題名/作者:
High-speed decoders for polar codes/ by Pascal Giard, Claude Thibeault, Warren J. Gross.
作者:
Giard, Pascal.
其他作者:
Thibeault, Claude.
出版者:
Cham :Springer International Publishing : : 2017.,
面頁冊數:
xviii, 98 p. :ill., digital ; : 24 cm.;
Contained By:
Springer eBooks
標題:
Error-correcting codes (Information theory) -
電子資源:
http://dx.doi.org/10.1007/978-3-319-59782-9
ISBN:
9783319597829
High-speed decoders for polar codes
Giard, Pascal.
High-speed decoders for polar codes
[electronic resource] /by Pascal Giard, Claude Thibeault, Warren J. Gross. - Cham :Springer International Publishing :2017. - xviii, 98 p. :ill., digital ;24 cm.
1 Polar Codes -- 2 Fast Low-Complexity Hardware Decoders for Low-Rate Polar Codes -- 3 Low-Latency Software Polar Decoders -- 4 Unrolled Hardware Architectures for Polar Decoders -- 5 Multi-mode Unrolled Polar Decoding -- 6 Conclusion and Future Work -- References -- Index.
A new class of provably capacity achieving error-correction codes, polar codes are suitable for many problems, such as lossless and lossy source coding, problems with side information, multiple access channel, etc. The first comprehensive book on the implementation of decoders for polar codes, the authors take a tutorial approach to explain the practical decoder implementation challenges and trade-offs in either software or hardware. They also demonstrate new trade-offs in latency, throughput, and complexity in software implementations for high-performance computing and GPGPUs, and hardware implementations using custom processing elements, full-custom application-specific integrated circuits (ASICs), and field-programmable-gate arrays (FPGAs) Presenting a good overview of this research area and future directions, High-Speed Decoders for Polar Codes is perfect for any researcher or SDR practitioner looking into implementing efficient decoders for polar codes, as well as students and professors in a modern error correction class. As polar codes have been accepted to protect the control channel in the next-generation mobile communication standard (5G) developed by the 3GPP, the audience includes engineers who will have to implement decoders for such codes and hardware engineers designing the backbone of communication networks.
ISBN: 9783319597829
Standard No.: 10.1007/978-3-319-59782-9doiSubjects--Topical Terms:
568233
Error-correcting codes (Information theory)
LC Class. No.: QA268
Dewey Class. No.: 005.717
High-speed decoders for polar codes
LDR
:02584nam a2200325 a 4500
001
923441
003
DE-He213
005
20180313131523.0
006
m d
007
cr nn 008maaau
008
190625s2017 gw s 0 eng d
020
$a
9783319597829
$q
(electronic bk.)
020
$a
9783319597812
$q
(paper)
024
7
$a
10.1007/978-3-319-59782-9
$2
doi
035
$a
978-3-319-59782-9
040
$a
GP
$c
GP
041
0
$a
eng
050
4
$a
QA268
072
7
$a
GPJ
$2
bicssc
072
7
$a
GPF
$2
bicssc
072
7
$a
COM031000
$2
bisacsh
082
0 4
$a
005.717
$2
23
090
$a
QA268
$b
.G435 2017
100
1
$a
Giard, Pascal.
$3
1199814
245
1 0
$a
High-speed decoders for polar codes
$h
[electronic resource] /
$c
by Pascal Giard, Claude Thibeault, Warren J. Gross.
260
$a
Cham :
$c
2017.
$b
Springer International Publishing :
$b
Imprint: Springer,
300
$a
xviii, 98 p. :
$b
ill., digital ;
$c
24 cm.
505
0
$a
1 Polar Codes -- 2 Fast Low-Complexity Hardware Decoders for Low-Rate Polar Codes -- 3 Low-Latency Software Polar Decoders -- 4 Unrolled Hardware Architectures for Polar Decoders -- 5 Multi-mode Unrolled Polar Decoding -- 6 Conclusion and Future Work -- References -- Index.
520
$a
A new class of provably capacity achieving error-correction codes, polar codes are suitable for many problems, such as lossless and lossy source coding, problems with side information, multiple access channel, etc. The first comprehensive book on the implementation of decoders for polar codes, the authors take a tutorial approach to explain the practical decoder implementation challenges and trade-offs in either software or hardware. They also demonstrate new trade-offs in latency, throughput, and complexity in software implementations for high-performance computing and GPGPUs, and hardware implementations using custom processing elements, full-custom application-specific integrated circuits (ASICs), and field-programmable-gate arrays (FPGAs) Presenting a good overview of this research area and future directions, High-Speed Decoders for Polar Codes is perfect for any researcher or SDR practitioner looking into implementing efficient decoders for polar codes, as well as students and professors in a modern error correction class. As polar codes have been accepted to protect the control channel in the next-generation mobile communication standard (5G) developed by the 3GPP, the audience includes engineers who will have to implement decoders for such codes and hardware engineers designing the backbone of communication networks.
650
0
$a
Error-correcting codes (Information theory)
$3
568233
650
0
$a
Decoders (Electronics)
$3
1063309
650
0
$a
Coding theory.
$3
561460
650
1 4
$a
Computer Science.
$3
593922
650
2 4
$a
Coding and Information Theory.
$3
669784
650
2 4
$a
Communications Engineering, Networks.
$3
669809
650
2 4
$a
Circuits and Systems.
$3
670901
650
2 4
$a
Signal, Image and Speech Processing.
$3
670837
700
1
$a
Thibeault, Claude.
$3
1199815
700
1
$a
Gross, Warren J.
$3
1199816
710
2
$a
SpringerLink (Online service)
$3
593884
773
0
$t
Springer eBooks
856
4 0
$u
http://dx.doi.org/10.1007/978-3-319-59782-9
950
$a
Computer Science (Springer-11645)
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