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Deposition of High-K Dielectrics on ...
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University of California, San Diego.
Deposition of High-K Dielectrics on 2D-Semiconductors via Low Temperature ALD.
紀錄類型:
書目-語言資料,印刷品 : Monograph/item
正題名/作者:
Deposition of High-K Dielectrics on 2D-Semiconductors via Low Temperature ALD./
作者:
Kwak, Iljo.
出版者:
Ann Arbor : ProQuest Dissertations & Theses, : 2018,
面頁冊數:
89 p.
附註:
Source: Dissertation Abstracts International, Volume: 80-05(E), Section: B.
Contained By:
Dissertation Abstracts International80-05B(E).
標題:
Materials science. -
電子資源:
http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=10937003
ISBN:
9780438757783
Deposition of High-K Dielectrics on 2D-Semiconductors via Low Temperature ALD.
Kwak, Iljo.
Deposition of High-K Dielectrics on 2D-Semiconductors via Low Temperature ALD.
- Ann Arbor : ProQuest Dissertations & Theses, 2018 - 89 p.
Source: Dissertation Abstracts International, Volume: 80-05(E), Section: B.
Thesis (Ph.D.)--University of California, San Diego, 2018.
2D materials such as graphene and TMDCs (Transition Metal Dichalcogenides) have increased interest in the research of future electronic devices due to their excellent electronic properties. These materials can be easily exfoliated to make a monolayer which enables us to study the 2D properties of the materials such as the quantum confinement effect. In case of TMDCs, intrinsic bandgaps of the materials provide possible applications in digital logic devices. TMDCs also have ideal material properties for TFETs (Tunnel Field Effect Transistors). Having no dangling bond at the materials' surface, defects at the heterojunction interface can be minimized enabling to obtain steep TFETs with lower subthreshold swing. To realize these properties in the devices, preparation of insulating and uniform gate oxide with low EOT (Equivlaent Oxide Thickness) is required. However, due to the inert surface nature of 2D materials, various functionalization techniques have been used to initiate nucleation of the gate oxide. However, these functionalization methods inevitably induce damage to 2D materials, changing the electronic properties of 2D materials. Therefore, for successful fabrication of 2D materials electronic devices, a more facile gate oxide deposition method with low surface defects is needed.
ISBN: 9780438757783Subjects--Topical Terms:
557839
Materials science.
Deposition of High-K Dielectrics on 2D-Semiconductors via Low Temperature ALD.
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2D materials such as graphene and TMDCs (Transition Metal Dichalcogenides) have increased interest in the research of future electronic devices due to their excellent electronic properties. These materials can be easily exfoliated to make a monolayer which enables us to study the 2D properties of the materials such as the quantum confinement effect. In case of TMDCs, intrinsic bandgaps of the materials provide possible applications in digital logic devices. TMDCs also have ideal material properties for TFETs (Tunnel Field Effect Transistors). Having no dangling bond at the materials' surface, defects at the heterojunction interface can be minimized enabling to obtain steep TFETs with lower subthreshold swing. To realize these properties in the devices, preparation of insulating and uniform gate oxide with low EOT (Equivlaent Oxide Thickness) is required. However, due to the inert surface nature of 2D materials, various functionalization techniques have been used to initiate nucleation of the gate oxide. However, these functionalization methods inevitably induce damage to 2D materials, changing the electronic properties of 2D materials. Therefore, for successful fabrication of 2D materials electronic devices, a more facile gate oxide deposition method with low surface defects is needed.
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This thesis consists of three parts. In the first part(Chapter 2), deposition of Al2O3/ HfO2 bilayer nanolaminate structures on Si0.7Ge0.3(100) by thermal ALD was studied to develop high-K oxide with lower interface defects for 2D materials. It is shown that Al2O3/ HfO2 bilayer or nanolaminate structures effectively reduced the density of interface traps more than 30% at the expense of a small capacitance drop in the accumulation. In addition, 3 orders of magnitude lower leakage currents were achieved compared to pure HfO2 layer. Second part (Chapter 3) introduces mechanism of low temperature ALD of Al2O3 on graphene. This study shows that a uniform and defect free Al2O3 film can be grown on graphene by ALD at low temperature without any functionalization techniques. The Capacitance-Voltage measurements of the 50 cycles of ALD Al2O3 films growth at 50°C showed 1.17 muF/cm2 with very low leakage current of the Al2O3 was in order of 10-5 A/cm 2 which is consistent with the absence of pinholes. In the last part(Chapter 4), deposition of high quality Al2O3 and HfO2/Al 2O3 films on 2D materials using low temperature ALD/CVD was demonstrated. Cmax and leakage current values of 50 cycles of low temperature ALD Al2O3 on MoS2, HOPG and Si0.7Ge 0.3(001) were comparable indicating uniform and pinhole free Al 2O3 films across the entire surface. To obtain lower EOT, Al2O3 (7 cycles at 50 °C)/HfO2(40 cycles at 300 °C) bilayer gate oxide was prepared on 2D materials substrates. Cmax was increased by 2x compared to 50 cycles Al2O3 MOSCAPs. In addition, Pd/Ti/TiN gate was employed to scavenge the oxygen from the oxide. Cmax of ∼2.7 muF/cm2 was achieved with MoS2 and HOPG without loss of leakage current density. All 2D materials MOSCAPs in this study had lower interfacial defect density (Dit) compared to the same gate stacks on Si0.7Ge0.3(001) indicating Van der Waals interactions between the oxide and the 2D material surfaces is dominant instead of chemical bondings.
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