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New data structures and algorithms f...
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Amaru, Luca Gaetano.
New data structures and algorithms for logic synthesis and verification
紀錄類型:
書目-語言資料,印刷品 : Monograph/item
正題名/作者:
New data structures and algorithms for logic synthesis and verification/ by Luca Gaetano Amaru.
作者:
Amaru, Luca Gaetano.
出版者:
Cham :Springer International Publishing : : 2017.,
面頁冊數:
xvi, 156 p. :ill. (some col.), digital ; : 24 cm.;
Contained By:
Springer eBooks
標題:
Data structures (Computer science) -
電子資源:
http://dx.doi.org/10.1007/978-3-319-43174-1
ISBN:
9783319431741
New data structures and algorithms for logic synthesis and verification
Amaru, Luca Gaetano.
New data structures and algorithms for logic synthesis and verification
[electronic resource] /by Luca Gaetano Amaru. - Cham :Springer International Publishing :2017. - xvi, 156 p. :ill. (some col.), digital ;24 cm.
Introduction -- Part 1. Logic Representation, Manipulation and Optimization -- Biconditional Logic -- Majority Logic -- Part 2. Logic Satisfiability and Equivalence Checking -- Exploiting Logic Properties to Speedup SAT -- Majority Normal Form Representation and Satisfiability -- Improvements to the Equivalence Checking of Reversible Circuits -- Conclusions.
ISBN: 9783319431741
Standard No.: 10.1007/978-3-319-43174-1doiSubjects--Topical Terms:
527864
Data structures (Computer science)
LC Class. No.: QA76.9.D35
Dewey Class. No.: 005.73
New data structures and algorithms for logic synthesis and verification
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Introduction -- Part 1. Logic Representation, Manipulation and Optimization -- Biconditional Logic -- Majority Logic -- Part 2. Logic Satisfiability and Equivalence Checking -- Exploiting Logic Properties to Speedup SAT -- Majority Normal Form Representation and Satisfiability -- Improvements to the Equivalence Checking of Reversible Circuits -- Conclusions.
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