國立虎尾科技大學 |

Cache replacement policies /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Cache replacement policies // Akanksha Jain and Calvin Lin.
作者:	Jain, Akanksha,
其他作者:	Lin, Yun Calvin,
面頁冊數:	1 PDF (xv, 71 pages) :illustrations (some color). :
附註:	Part of: Synthesis digital library of engineering and computer science.
標題:	Memory management (Computer science) -
電子資源:	https://ieeexplore.ieee.org/servlet/opac?bknumber=8742888
電子資源:	https://doi.org/10.2200/S00922ED1V01Y201905CAC047
ISBN:	9781681735771

Cache replacement policies /
Jain, Akanksha,

Cache replacement policies /Akanksha Jain and Calvin Lin. - 1 PDF (xv, 71 pages) :illustrations (some color). - Synthesis lectures in computer architecture,#471935-3243 ;. - Synthesis digital library of engineering and computer science..

Part of: Synthesis digital library of engineering and computer science.

Includes bibliographical references (pages 63-70).

1. Introduction -- 2. A taxonomy of cache replacement policies -- 2.1. Coarse-grained policies -- 2.2. Fine-grained policies -- 2.3. Design considerations

Abstract freely available; full-text restricted to subscribers or individual document purchasers.

Compendex

This book summarizes the landscape of cache replacement policies for CPU data caches. The emphasis is on algorithmic issues, so the authors start by defining a taxonomy that places previous policies into two broad categories, which they refer to as coarse-grained and fine-grained policies. Each of these categories is then divided into three subcategories that describe different approaches to solving the cache replacement problem, along with summaries of significant work in each category. Richer factors, including solutions that optimize for metrics beyond cache miss rates, that are tailored to multi-core settings, that consider interactions with prefetchers, and that consider new memory technologies, are then explored. The book concludes by discussing trends and challenges for future work. This book, which assumes that readers will have a basic understanding of computer architecture and caches, will be useful to academics and practitioners across the field.

Mode of access: World Wide Web.

ISBN: 9781681735771

Standard No.: 10.2200/S00922ED1V01Y201905CAC047doiSubjects--Topical Terms:

719496
Memory management (Computer science)
Subjects--Index Terms:

hardware caches

LC Class. No.: QA76.9.M45 / J353 2019eb

Dewey Class. No.: 005.4/2

Cache replacement policies /
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020 $z 9781681735788 $q hardcover
020 $z 9781681735764 $q paperback
024 7 $a 10.2200/S00922ED1V01Y201905CAC047 $2 doi
035 $a (CaBNVSL)thg00979215
035 $a (OCoLC)1107277433
035 $a 8742888
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050 4 $a QA76.9.M45 $b J353 2019eb
082 0 4 $a 005.4/2 $2 23
100 1 $a Jain, Akanksha, $e author. $3 1253116
245 1 0 $a Cache replacement policies / $c Akanksha Jain and Calvin Lin.
264 1 $a [San Rafael, California] : $b Morgan & Claypool, $c 2019.
300 $a 1 PDF (xv, 71 pages) : $b illustrations (some color).
336 $a text $2 rdacontent
337 $a electronic $2 isbdmedia
338 $a online resource $2 rdacarrier
490 1 $a Synthesis lectures in computer architecture, $x 1935-3243 ; $v #47
500 $a Part of: Synthesis digital library of engineering and computer science.
504 $a Includes bibliographical references (pages 63-70).
505 0 $a 1. Introduction -- 2. A taxonomy of cache replacement policies -- 2.1. Coarse-grained policies -- 2.2. Fine-grained policies -- 2.3. Design considerations
505 8 $a 3. Coarse-grained replacement policies -- 3.1. Recency-based policies -- 3.2. Frequency-based policies -- 3.3. Hybrid policies
505 8 $a 4. Fine-grained replacement policies -- 4.1. Reuse distance prediction policies -- 4.2. Classification-based policies -- 4.3. Other prediction metrics
505 8 $a 5. Richer considerations -- 5.1. Cost-aware cache replacement -- 5.2. Criticality-driven cache optimizations -- 5.3. Multi-core-aware cache management -- 5.4. Prefetch-aware cache replacement -- 5.5. Cache architecture-aware cache replacement -- 5.6. New technology considerations -- 6. Conclusions.
506 $a Abstract freely available; full-text restricted to subscribers or individual document purchasers.
510 0 $a Compendex
510 0 $a INSPEC
510 0 $a Google scholar
510 0 $a Google book search
520 $a This book summarizes the landscape of cache replacement policies for CPU data caches. The emphasis is on algorithmic issues, so the authors start by defining a taxonomy that places previous policies into two broad categories, which they refer to as coarse-grained and fine-grained policies. Each of these categories is then divided into three subcategories that describe different approaches to solving the cache replacement problem, along with summaries of significant work in each category. Richer factors, including solutions that optimize for metrics beyond cache miss rates, that are tailored to multi-core settings, that consider interactions with prefetchers, and that consider new memory technologies, are then explored. The book concludes by discussing trends and challenges for future work. This book, which assumes that readers will have a basic understanding of computer architecture and caches, will be useful to academics and practitioners across the field.
530 $a Also available in print.
538 $a Mode of access: World Wide Web.
538 $a System requirements: Adobe Acrobat Reader.
588 $a Title from PDF title page (viewed on June 26, 2019).
650 0 $a Memory management (Computer science) $3 719496
650 0 $a Microprocessors. $3 632481
650 0 $a Cache memory. $3 894412
650 0 $a Systems software. $3 805433
653 $a hardware caches
653 $a cache replacement policies
653 $a cache hit rate
653 $a reducing memory latency
653 $a reducing memory traffic
700 1 $a Lin, Yun Calvin, $e author. $3 1253117
776 0 8 $i Print version: $z 9781681735764 $z 9781681735788
830 0 $a Synthesis digital library of engineering and computer science. $3 598254
830 0 $a Synthesis lectures in computer architecture ; $v #41 $3 1137472
856 4 2 $3 Abstract with links to resource $u https://ieeexplore.ieee.org/servlet/opac?bknumber=8742888
856 4 0 $3 Abstract with links to full text $u https://doi.org/10.2200/S00922ED1V01Y201905CAC047