語系:
繁體中文
English
說明(常見問題)
登入
回首頁
切換:
標籤
|
MARC模式
|
ISBD
CMOS Continuous-Time Adaptive Equali...
~
SpringerLink (Online service)
CMOS Continuous-Time Adaptive Equalizers for High-Speed Serial Links
紀錄類型:
書目-語言資料,印刷品 : Monograph/item
正題名/作者:
CMOS Continuous-Time Adaptive Equalizers for High-Speed Serial Links/ by Cecilia Gimeno Gasca, Santiago Celma Pueyo, Concepción Aldea Chagoyen.
作者:
Gimeno Gasca, Cecilia.
其他作者:
Celma Pueyo, Santiago.
面頁冊數:
XXII, 148 p. 136 illus., 85 illus. in color.online resource. :
Contained By:
Springer Nature eBook
標題:
Electronic circuits. -
電子資源:
https://doi.org/10.1007/978-3-319-10563-5
ISBN:
9783319105635
CMOS Continuous-Time Adaptive Equalizers for High-Speed Serial Links
Gimeno Gasca, Cecilia.
CMOS Continuous-Time Adaptive Equalizers for High-Speed Serial Links
[electronic resource] /by Cecilia Gimeno Gasca, Santiago Celma Pueyo, Concepción Aldea Chagoyen. - 1st ed. 2015. - XXII, 148 p. 136 illus., 85 illus. in color.online resource. - Analog Circuits and Signal Processing,1872-082X. - Analog Circuits and Signal Processing,.
Introduction -- Theoretical Study of Continuous-Time Equalizers -- Continuous-Time Linear Equalizers -- Adaptation Loop -- Receiver Front-End For 1.25 GB/s SI-POF -- Conclusions. .
This book introduces readers to the design of adaptive equalization solutions integrated in standard CMOS technology for high-speed serial links. Since continuous-time equalizers offer various advantages as an alternative to discrete-time equalizers at multi-gigabit rates, this book provides a detailed description of continuous-time adaptive equalizers design - both at transistor and system levels-, their main characteristics and performances. The authors begin with a complete review and analysis of the state of the art of equalizers for wireline applications, describing why they are necessary, their types, and their main applications. Next, theoretical fundamentals of continuous-time adaptive equalizers are explored. Then, new structures are proposed to implement the different building blocks of the adaptive equalizer: line equalizer, loop-filters, power comparator, etc. The authors demonstrate the design of a complete low-power, low-voltage, high-speed, continuous-time adaptive equalizer. Finally, a cost-effective CMOS receiver which includes the proposed continuous-time adaptive equalizer is designed for 1.25 Gb/s optical communications through 50-m length, 1-mm diameter plastic optical fiber (POF). · Covers complete design flow of continuous-time adaptive equalizers, from analysis of theoretical fundamentals to the final architecture; · Includes analysis, design, and implementation of the main adaptive equalizer blocks, revealing key challenges and solutions in the design of such high performance cells; · Discusses the most important points in the design of an adaptive equalizer, considering restrictions of the optical link and the limitations in submicron CMOS implementations. .
ISBN: 9783319105635
Standard No.: 10.1007/978-3-319-10563-5doiSubjects--Topical Terms:
563332
Electronic circuits.
LC Class. No.: TK7888.4
Dewey Class. No.: 621.3815
CMOS Continuous-Time Adaptive Equalizers for High-Speed Serial Links
LDR
:03416nam a22004095i 4500
001
962808
003
DE-He213
005
20200629201716.0
007
cr nn 008mamaa
008
201211s2015 gw | s |||| 0|eng d
020
$a
9783319105635
$9
978-3-319-10563-5
024
7
$a
10.1007/978-3-319-10563-5
$2
doi
035
$a
978-3-319-10563-5
050
4
$a
TK7888.4
072
7
$a
TJFC
$2
bicssc
072
7
$a
TEC008010
$2
bisacsh
072
7
$a
TJFC
$2
thema
082
0 4
$a
621.3815
$2
23
100
1
$a
Gimeno Gasca, Cecilia.
$4
aut
$4
http://id.loc.gov/vocabulary/relators/aut
$3
1062768
245
1 0
$a
CMOS Continuous-Time Adaptive Equalizers for High-Speed Serial Links
$h
[electronic resource] /
$c
by Cecilia Gimeno Gasca, Santiago Celma Pueyo, Concepción Aldea Chagoyen.
250
$a
1st ed. 2015.
264
1
$a
Cham :
$b
Springer International Publishing :
$b
Imprint: Springer,
$c
2015.
300
$a
XXII, 148 p. 136 illus., 85 illus. in color.
$b
online resource.
336
$a
text
$b
txt
$2
rdacontent
337
$a
computer
$b
c
$2
rdamedia
338
$a
online resource
$b
cr
$2
rdacarrier
347
$a
text file
$b
PDF
$2
rda
490
1
$a
Analog Circuits and Signal Processing,
$x
1872-082X
505
0
$a
Introduction -- Theoretical Study of Continuous-Time Equalizers -- Continuous-Time Linear Equalizers -- Adaptation Loop -- Receiver Front-End For 1.25 GB/s SI-POF -- Conclusions. .
520
$a
This book introduces readers to the design of adaptive equalization solutions integrated in standard CMOS technology for high-speed serial links. Since continuous-time equalizers offer various advantages as an alternative to discrete-time equalizers at multi-gigabit rates, this book provides a detailed description of continuous-time adaptive equalizers design - both at transistor and system levels-, their main characteristics and performances. The authors begin with a complete review and analysis of the state of the art of equalizers for wireline applications, describing why they are necessary, their types, and their main applications. Next, theoretical fundamentals of continuous-time adaptive equalizers are explored. Then, new structures are proposed to implement the different building blocks of the adaptive equalizer: line equalizer, loop-filters, power comparator, etc. The authors demonstrate the design of a complete low-power, low-voltage, high-speed, continuous-time adaptive equalizer. Finally, a cost-effective CMOS receiver which includes the proposed continuous-time adaptive equalizer is designed for 1.25 Gb/s optical communications through 50-m length, 1-mm diameter plastic optical fiber (POF). · Covers complete design flow of continuous-time adaptive equalizers, from analysis of theoretical fundamentals to the final architecture; · Includes analysis, design, and implementation of the main adaptive equalizer blocks, revealing key challenges and solutions in the design of such high performance cells; · Discusses the most important points in the design of an adaptive equalizer, considering restrictions of the optical link and the limitations in submicron CMOS implementations. .
650
0
$a
Electronic circuits.
$3
563332
650
0
$a
Electronics.
$3
596389
650
0
$a
Microelectronics.
$3
554956
650
1 4
$a
Circuits and Systems.
$3
670901
650
2 4
$a
Electronics and Microelectronics, Instrumentation.
$3
670219
700
1
$a
Celma Pueyo, Santiago.
$4
aut
$4
http://id.loc.gov/vocabulary/relators/aut
$3
1062769
700
1
$a
Aldea Chagoyen, Concepción.
$e
author.
$4
aut
$4
http://id.loc.gov/vocabulary/relators/aut
$3
1257705
710
2
$a
SpringerLink (Online service)
$3
593884
773
0
$t
Springer Nature eBook
776
0 8
$i
Printed edition:
$z
9783319105628
776
0 8
$i
Printed edition:
$z
9783319105642
776
0 8
$i
Printed edition:
$z
9783319384856
830
0
$a
Analog Circuits and Signal Processing,
$x
1872-082X
$3
1254348
856
4 0
$u
https://doi.org/10.1007/978-3-319-10563-5
912
$a
ZDB-2-ENG
912
$a
ZDB-2-SXE
950
$a
Engineering (SpringerNature-11647)
950
$a
Engineering (R0) (SpringerNature-43712)
筆 0 讀者評論
多媒體
評論
新增評論
分享你的心得
Export
取書館別
處理中
...
變更密碼[密碼必須為2種組合(英文和數字)及長度為10碼以上]
登入