語系:
繁體中文
English
說明(常見問題)
登入
回首頁
切換:
標籤
|
MARC模式
|
ISBD
FPGA Design = Best Practices for Tea...
~
SpringerLink (Online service)
FPGA Design = Best Practices for Team-based Reuse /
紀錄類型:
書目-語言資料,印刷品 : Monograph/item
正題名/作者:
FPGA Design/ by Philip Andrew Simpson.
其他題名:
Best Practices for Team-based Reuse /
作者:
Simpson, Philip Andrew.
面頁冊數:
XI, 257 p. 129 illus., 85 illus. in color.online resource. :
Contained By:
Springer Nature eBook
標題:
Electronic circuits. -
電子資源:
https://doi.org/10.1007/978-3-319-17924-7
ISBN:
9783319179247
FPGA Design = Best Practices for Team-based Reuse /
Simpson, Philip Andrew.
FPGA Design
Best Practices for Team-based Reuse /[electronic resource] :by Philip Andrew Simpson. - 2nd ed. 2015. - XI, 257 p. 129 illus., 85 illus. in color.online resource.
Introduction -- Project Management -- Design Specification -- System Modeling -- Resource Scoping -- Design Environment -- Board Design -- Power and Thermal analysis -- Team Based Design -- RTL Design -- IP reuse -- Embedded Design -- Functional verification -- Timing Closure -- High level Design -- In System Debug -- Design Sign-off.
This book describes best practices for successful FPGA design. It is the result of the author’s meetings with hundreds of customers on the challenges facing each of their FPGA design teams. By gaining an understanding into their design environments, processes, what works and what does not work, key areas of concern in implementing system designs have been identified and a recommended design methodology to overcome these challenges has been developed. This book’s content has a strong focus on design teams that are spread across sites. The goal being to increase the productivity of FPGA design teams by establishing a common methodology across design teams; enabling the exchange of design blocks across teams. Coverage includes the complete FPGA design flow, from the basics to advanced techniques. This new edition has been enhanced to include new sections on System modeling, embedded design and high level design. The original sections on Design Environment, RTL design and timing closure have all been expanded to include more up to date techniques as well as providing more extensive scripts and RTL code that can be reused by readers. Presents complete, field-tested methodology for FPGA design, focused on reuse across design teams; Offers best practices for FPGA timing closure, in-system debug, and board design; Details techniques to resolve common pitfalls in designing with FPGAs.
ISBN: 9783319179247
Standard No.: 10.1007/978-3-319-17924-7doiSubjects--Topical Terms:
563332
Electronic circuits.
LC Class. No.: TK7888.4
Dewey Class. No.: 621.3815
FPGA Design = Best Practices for Team-based Reuse /
LDR
:03080nam a22003975i 4500
001
965259
003
DE-He213
005
20200703121742.0
007
cr nn 008mamaa
008
201211s2015 gw | s |||| 0|eng d
020
$a
9783319179247
$9
978-3-319-17924-7
024
7
$a
10.1007/978-3-319-17924-7
$2
doi
035
$a
978-3-319-17924-7
050
4
$a
TK7888.4
072
7
$a
TJFC
$2
bicssc
072
7
$a
TEC008010
$2
bisacsh
072
7
$a
TJFC
$2
thema
082
0 4
$a
621.3815
$2
23
100
1
$a
Simpson, Philip Andrew.
$e
author.
$4
aut
$4
http://id.loc.gov/vocabulary/relators/aut
$3
1260837
245
1 0
$a
FPGA Design
$h
[electronic resource] :
$b
Best Practices for Team-based Reuse /
$c
by Philip Andrew Simpson.
250
$a
2nd ed. 2015.
264
1
$a
Cham :
$b
Springer International Publishing :
$b
Imprint: Springer,
$c
2015.
300
$a
XI, 257 p. 129 illus., 85 illus. in color.
$b
online resource.
336
$a
text
$b
txt
$2
rdacontent
337
$a
computer
$b
c
$2
rdamedia
338
$a
online resource
$b
cr
$2
rdacarrier
347
$a
text file
$b
PDF
$2
rda
505
0
$a
Introduction -- Project Management -- Design Specification -- System Modeling -- Resource Scoping -- Design Environment -- Board Design -- Power and Thermal analysis -- Team Based Design -- RTL Design -- IP reuse -- Embedded Design -- Functional verification -- Timing Closure -- High level Design -- In System Debug -- Design Sign-off.
520
$a
This book describes best practices for successful FPGA design. It is the result of the author’s meetings with hundreds of customers on the challenges facing each of their FPGA design teams. By gaining an understanding into their design environments, processes, what works and what does not work, key areas of concern in implementing system designs have been identified and a recommended design methodology to overcome these challenges has been developed. This book’s content has a strong focus on design teams that are spread across sites. The goal being to increase the productivity of FPGA design teams by establishing a common methodology across design teams; enabling the exchange of design blocks across teams. Coverage includes the complete FPGA design flow, from the basics to advanced techniques. This new edition has been enhanced to include new sections on System modeling, embedded design and high level design. The original sections on Design Environment, RTL design and timing closure have all been expanded to include more up to date techniques as well as providing more extensive scripts and RTL code that can be reused by readers. Presents complete, field-tested methodology for FPGA design, focused on reuse across design teams; Offers best practices for FPGA timing closure, in-system debug, and board design; Details techniques to resolve common pitfalls in designing with FPGAs.
650
0
$a
Electronic circuits.
$3
563332
650
0
$a
Microprocessors.
$3
632481
650
0
$a
Electronics.
$3
596389
650
0
$a
Microelectronics.
$3
554956
650
1 4
$a
Circuits and Systems.
$3
670901
650
2 4
$a
Processor Architectures.
$3
669787
650
2 4
$a
Electronics and Microelectronics, Instrumentation.
$3
670219
710
2
$a
SpringerLink (Online service)
$3
593884
773
0
$t
Springer Nature eBook
776
0 8
$i
Printed edition:
$z
9783319179254
776
0 8
$i
Printed edition:
$z
9783319179230
776
0 8
$i
Printed edition:
$z
9783319342481
856
4 0
$u
https://doi.org/10.1007/978-3-319-17924-7
912
$a
ZDB-2-ENG
912
$a
ZDB-2-SXE
950
$a
Engineering (SpringerNature-11647)
950
$a
Engineering (R0) (SpringerNature-43712)
筆 0 讀者評論
多媒體
評論
新增評論
分享你的心得
Export
取書館別
處理中
...
變更密碼[密碼必須為2種組合(英文和數字)及長度為10碼以上]
登入