國立虎尾科技大學 |

Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing = From Algorithm to Architecture /

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing/ by Chenxin Zhang, Liang Liu, Viktor Öwall.
其他題名:	From Algorithm to Architecture /
作者:	Zhang, Chenxin.
其他作者:	Liu, Liang.
面頁冊數:	XIV, 195 p. 81 illus., 29 illus. in color.online resource. :
Contained By:	Springer Nature eBook
標題:	Electronic circuits. -
電子資源:	https://doi.org/10.1007/978-3-319-24004-6
ISBN:	9783319240046

Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing = From Algorithm to Architecture /
Zhang, Chenxin.

Heterogeneous Reconfigurable Processors for Real-Time Baseband ProcessingFrom Algorithm to Architecture /[electronic resource] :by Chenxin Zhang, Liang Liu, Viktor Öwall. - 1st ed. 2016. - XIV, 195 p. 81 illus., 29 illus. in color.online resource.

Introduction -- Digital Hardware Platforms -- Digital Baseband Processing -- The Reconfigurable Cell Array -- Multi-standard Digital Front-End Processing -- Multi-task MIMO Signal Processing -- Future Multi-user MIMO systems – A Discussion -- Conclusion.-.

This book focuses on domain-specific heterogeneous reconfigurable architectures, demonstrating for readers a computing platform which is flexible enough to support multiple standards, multiple modes, and multiple algorithms. The content is multi-disciplinary, covering areas of wireless communication, computing architecture, and circuit design. The platform described provides real-time processing capability with reasonable implementation cost, achieving balanced trade-offs among flexibility, performance, and hardware costs. The authors discuss efficient design methods for wireless communication processing platforms, from both an algorithm and architecture design perspective. Coverage also includes computing platforms for different wireless technologies and standards, including MIMO, OFDM, Massive MIMO, DVB, WLAN, LTE/LTE-A, and 5G. •Discusses reconfigurable architectures, including hardware building blocks such as processing elements, memory sub-systems, Network-on-Chip (NoC), and dynamic hardware reconfiguration; •Describes a unique design and optimization methodology, applied to different areas and levels, including communication theory, hardware implementation, and software support; •Demonstrates design trade-offs during different development phases and enables readers to apply similar techniques to various applications.

ISBN: 9783319240046

Standard No.: 10.1007/978-3-319-24004-6doiSubjects--Topical Terms:

563332
Electronic circuits.

LC Class. No.: TK7888.4

Dewey Class. No.: 621.3815

Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing = From Algorithm to Architecture /
LDR:02973nam a22003855i 4500 001 977420
003 DE-He213
005 20200704041212.0
007 cr nn 008mamaa
008 201211s2016 gw | s |||| 0|eng d
020 $a 9783319240046 $9 978-3-319-24004-6
024 7 $a 10.1007/978-3-319-24004-6 $2 doi
035 $a 978-3-319-24004-6
050 4 $a TK7888.4
072 7 $a TJFC $2 bicssc
072 7 $a TEC008010 $2 bisacsh
072 7 $a TJFC $2 thema
082 0 4 $a 621.3815 $2 23
100 1 $a Zhang, Chenxin. $4 aut $4 http://id.loc.gov/vocabulary/relators/aut $3 1104769
245 1 0 $a Heterogeneous Reconfigurable Processors for Real-Time Baseband Processing $h [electronic resource] : $b From Algorithm to Architecture / $c by Chenxin Zhang, Liang Liu, Viktor Öwall.
250 $a 1st ed. 2016.
264 1 $a Cham : $b Springer International Publishing : $b Imprint: Springer, $c 2016.
300 $a XIV, 195 p. 81 illus., 29 illus. in color. $b online resource.
336 $a text $b txt $2 rdacontent
337 $a computer $b c $2 rdamedia
338 $a online resource $b cr $2 rdacarrier
347 $a text file $b PDF $2 rda
505 0 $a Introduction -- Digital Hardware Platforms -- Digital Baseband Processing -- The Reconfigurable Cell Array -- Multi-standard Digital Front-End Processing -- Multi-task MIMO Signal Processing -- Future Multi-user MIMO systems – A Discussion -- Conclusion.-.
520 $a This book focuses on domain-specific heterogeneous reconfigurable architectures, demonstrating for readers a computing platform which is flexible enough to support multiple standards, multiple modes, and multiple algorithms. The content is multi-disciplinary, covering areas of wireless communication, computing architecture, and circuit design. The platform described provides real-time processing capability with reasonable implementation cost, achieving balanced trade-offs among flexibility, performance, and hardware costs. The authors discuss efficient design methods for wireless communication processing platforms, from both an algorithm and architecture design perspective. Coverage also includes computing platforms for different wireless technologies and standards, including MIMO, OFDM, Massive MIMO, DVB, WLAN, LTE/LTE-A, and 5G. •Discusses reconfigurable architectures, including hardware building blocks such as processing elements, memory sub-systems, Network-on-Chip (NoC), and dynamic hardware reconfiguration; •Describes a unique design and optimization methodology, applied to different areas and levels, including communication theory, hardware implementation, and software support; •Demonstrates design trade-offs during different development phases and enables readers to apply similar techniques to various applications.
650 0 $a Electronic circuits. $3 563332
650 0 $a Microprocessors. $3 632481
650 0 $a Electronics. $3 596389
650 0 $a Microelectronics. $3 554956
650 1 4 $a Circuits and Systems. $3 670901
650 2 4 $a Processor Architectures. $3 669787
650 2 4 $a Electronics and Microelectronics, Instrumentation. $3 670219
700 1 $a Liu, Liang. $4 aut $4 http://id.loc.gov/vocabulary/relators/aut $3 1104770
700 1 $a Öwall, Viktor. $e author. $4 aut $4 http://id.loc.gov/vocabulary/relators/aut $3 1271143
710 2 $a SpringerLink (Online service) $3 593884
773 0 $t Springer Nature eBook
776 0 8 $i Printed edition: $z 9783319240022
776 0 8 $i Printed edition: $z 9783319240039
856 4 0 $u https://doi.org/10.1007/978-3-319-24004-6
912 $a ZDB-2-ENG
912 $a ZDB-2-SXE
950 $a Engineering (SpringerNature-11647)
950 $a Engineering (R0) (SpringerNature-43712)